Verilog-A Compact Model Coding Whitepaper
(White Paper by Dolphin)

Going Serial: Breaking the Billion Access Per Second Barrier
(White Paper by MoSys)

The Gigachip Interface: Efficient Board Level Chip-to-Chip Look-Aside Communication
(White Paper by MoSys)

Breaking the 2 Giga Access Barrier: Overcoming Limited I/O Pin Counts
(White Paper by MoSys)

Interconnect Solutions for 40G/100G Systems
(White Paper by MoSys)

The Challenge of Re-Use
(White Paper by eSilicon)

The Importance of True Randomness in Cryptography
(White Paper by AuthenTec)

Securing Highly Sensitive Assets with AuthenTec's SafeZone Secure Platform
(White Paper by AuthenTec)

Smart Engine for Public Key cryptography
(White Paper by Barco Silex)

RF and baseband SOC in 65 nm CMOS for Intelligent Transport Systems based on the Catena IEEE802.11x platform
By Mats Carlsson (2011-11-29)

The Challenges of Using Open Market IP In ASIC Designs
By Mohit Gupta (2011-11-01)

8051s in the Spectrum of Microcontroller Choices
By Nikos Zervas (2011-10-18)

Concurrent Collaboration Ensures Optimized IP Development at the Leading Edge
By Walter Ng (2011-08-09)

Eliminating Test Time Hence Eliminating Test Cost (Virtually)
By Yen Liu (2011-07-26)

3D IC Test is a Major Topic at SEMICON 2011 Taiwan
By Yen Lieu (2011-10-11)