Integration-optimized IP
Today's SoC designs require a new definition of IP, one that extends beyond traditional IP to address integration complexity, verification and software to significantly reduce the cost of SoC design. In this definition of IP we deliver a fully integrated IP stack that extends from the physical interface though the controller to the bare-metal software, and includes a comprehensive design and verification environment.

Component IP
Complementing Integration-Optimized IP, component IP provides both common and high-performance Silicon IP that can be utilized in many different designs. Component IP is of high quality, has a well defined set of deliverables, and works well in your SoC design environment.

Verification IP
Cadence® Incisive® Verification IP (VIP) delivers the industry's broadest and deepest VIP portfolio, proven on well over 2,000 verification projects. It supports more than 30 protocols, including AMBA AHB and AXI and the new AMBA 4 (AXI4), PCI Express, USB, Ethernet, MIPI, OCP, SAS and SATA and many more. This means Cadence can typically provide all the protocol verification required for your project. And with nearly 10 years of expertise and success in VIP creation and deployment, Cadence provides users the single best choice to meet their verification predictability, productivity, and quality needs.