Filter Your keyword search by content and/or vendor:
Describe the service you need (example: IP, design services, foundry, ASIC) then submit your request.2.
Chipestimate.com's conceirge service will contact leading suppliers on your behalf.3.
Suppliers with solutions matching your needs will follow up with you directly.
Density optimized Standard Cell Libraries are a collection of ASIC building blocks designed for high density or cost critical applications.Browse for Density Optimized IP / IP Cores
Standard Cell Libraries are a collection of ASIC building blocks.Browse for Other IP / IP Cores
What do all of these things have in common? They were key topics addressed by Cadence...
ARM1136J-S processor w/o cache
SecurCode 32-bit RISC CPU. Designed for 180nm
ARM11MPCore Multiprocessor Core with three processors with cache