December 29, 2009   
Performance of high resolution analog functions embedded into a SoC guaranteed by the Three-Noise-Path method
 
Florian Espalieu
Project Manager
Dolphin Integration
System-on-Chip (SoC) integrators have to put in place appropriate verifications in order to guarantee performance of analog Virtual Components (ViCs), also called IP blocks, once integrated into the SoC.

Such performances may be affected by various kinds of noise and the most critical issue in integrating analog functions is then to assess potential noise sources, to control noise propagation channels through the SoC and to evaluate noise impact at the interface between the ViC and the rest of the SoC.
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MIPI/MDDI Unified PHY IP from Mixel
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Our differentiated & customized Analog IP bring Certainty to SOC design, leveraging a rich portfolio of silicon-proven cores covering A/D, D/A, Power, MIPI, LVDS, Audio, PLLs in 40nm/65nm to 180nm nodes of leading foundries. more >>
 
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Picked as One of the Top Innovations of 2009
PLDA AXI-PCIe IP Bridge Core delivers high speed bus interconnect solutions for performance embedded applications: - PCIe Gen 1 and Gen II compatible - 32-bit AXI master and slave interfaces - Programmable AXI frequency - PCIe devices transfer directly to/from AXI devices - Concurrent DMA read/write, AXI-to-PCIe and PCIe-to-AXI transfers. Contact PLDA today for product details. www.plda.com more >>
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