10-bit ADC-The CC10080IQADC-T40LP is a high performance CMOS dual ADC that digitizes signals at sampling rates up to 80MSPS and converts to 10-bits resolution at 80MSPS at a low power dissipation. The reference voltages for the ADC are internally generated and require no external components. A power down capability is included for extremely low power dissipation in power down mode. The wake up time from power down is 1uS.
Speed: 80 MSPS
Low IQADC Power dissipation: 60mW
DNL: 0.75LSB, INL: 1LSB
TSMC 40nm LP with 2.5V IO and with multiple metal-stack options support