The DISPLAY-CTRL-4K is a synthesizable core intended for use in the AMBA® AXI bus-based microprocessor systems. It is a complete module of a digital video data path, which is transferred directly to the image display device interfaces such as DVI, HDMI or DisplayPort transmitters.
The display controller supports a wide range of resolutions in both standard and widescreen formats. The maximum supported resolution is 4096 by 2160 pixels.
The standard video data output is the most popular 24-bit per pixel RGB format. However, others formats like 30-bit, 36-bit, 48-bit per pixel or other can be easily implemented according to user requirements.
The data format in which the controller takes information from the system memory and stores in the FIFO is typical two 24-bit pixels per 64-bit data, but other data formats are also supported.
Maximum supported resolutions of 4096x2160p 24fps 36-bit/pixel or 1920x1200p 60fps 48-bit/pixel
Choice of video output interface between RGB pixel data, HSYNC/ VSYNC and Data Enable (BLANK) signals
Progressive scanning mode support
Fully configurable screen resolutions and aspect ratios
Configurable polarization of HSYNC and VSYNC signals
AXI master interface to the system memory
AXI slave interface to the host controller
Configurable internal FIFO
Internal, event stimulated, interrupt request generation with masking capability
Integrated test mode – generates color bar without any AXI bus transactions
Verilog RTL source code
Synthesis support for Synopsys® and Cadence® tools with a complete set of synthesis scripts
Simulation support for Mentor Graphics® and Cadence® tools with a set of scripts and macros
Consumer Electronics, Data Processing, Industrial and Medical, Others
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