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AES Decryption - 1Gbps Multi Assets Decryptor

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IP Name
IPX-AES-MD
Provider

intoPIX

Description

AES Decryption - 1Gbps Multi Assets Decryptor

Categories
Portability
ASIC, FPGA
Process Node
all
Type
Soft IP
Maturity
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Overview
The IPX-AES-MD Decryptor IP-Core provides an efficient FPGA implementation of the Advanced Encryption Standard (AES). Its flexibility allows the combination of several functions and operating modes for a very small FPGA footprint.

The IPX-AES-MD IP-Core is a 1Gbps Multi Assets Decryptor core that efficiently implements in FPGA the Advanced Encryption Standard as specified in the Federal Information Processing publication FIPS-197 of the National Institute of Standards and Technology.

The IPX-AES-MD can be customized to ensure its optimization for a wide range of specific application fields with a design architecture that can be adapted to support from low up to very high bit-rates. Its flexibility allows combining several functions and operating modes on very small footprints.

Features
  • AES Decryption : 1Gbps Multi Assets Decryptor
  • Throughput bit rate: 2,5Gbps
  • Data-stream handling : Single or Multiple streams (up to 16)
  • Operation modes: ECB, CBC
  • AES Data and Key Bus widths : 128 bits
  • Ultra Low footprint
Deliverables
  • RTL code or Netlist (depending on license type)
  • Functional simulation testbench
  • Synthesis Script
  • User Manual
Market Category
Data Processing, Industrial and Medical, Military/Civil Aerospace, Others
Datasheet
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Gate Count
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QIP Rating  This IP is not yet QIP rated.
 
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Keywords
Node
28nm      40 nm      55 nm      90 nm      150 nm      250 nm     
32nm      45 nm      65 nm      130 nm      180 nm      350 nm     
Foundry
Common Platform
GLOBALFOUNDRIES
IBM
SilTerra
SMIC
TSMC
Tower
UMC
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Category
Vendor
Portability
ASIC FPGA Structured
IP Quality
QIP Rated

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