AES-CCM provides confidentiality and authentication for wireless systems in FPGA or ASIC technology

Algotronix

AES-CCM provides confidentiality and authentication for wireless systems in FPGA or ASIC technology

• IP Catalog : Digital Core IP : Communications : Wireless : 802.11
• IP Catalog : Digital Core IP : Security : Encryption
• IP Catalog : Digital Core IP : Security : Decryption

• Full Implementation of AES Counter with CBC MAC Mode (CCM) including Additional Authenticated Data (AAD)
• Meets requirements of WiFi, WiMax and ZigBee wireless networking standards
• Targets all modern FPGA families from Xilinx, Altera, Lattice and Microsemi (Actel) and ASIC technology
• Parameterizable core to trade off performance against footprint/gate count
• Supports 128, 192 and 256-bit key lengths
• Based on Algotronix G3 core with 32 Bit Internal data path width and option of one or two internal AES cores provides good efficiency on typical applications
• Applications include military and government communications
• Compatible with Algotronix interface to NIOS, MicroBlaze or PowerPC processor
• Supplied as easily customizable portable VHDL or Verilog to allow customers to conduct their own code review in high-security applications
• Supplied with a testbench which reads vectors in the file format specified in the NIST CCM Verification System (CCMVS)

• VHDL or Verilog
• Optimizations for Xilinx, Altera, Lattice and Microsemi (Actel) FPGAs or ASIC technology
• Comprehensive self-checking testbench compliant with NIST CCMVS