ATA7_HOST1

Overview:

ATA-7 compliant host controller core used for interfacing ATA devices like hard-disks and CD/DVD drives. Core is targeted for SOC implementations in ASIC and FPGA.

Deliverables

Test Bench (Verilog Source Code)

Documentation

Reference design incl. C code

Free Tech Support

Features

PIO modes 0-4

Multi-word DMA modes 0-2

Ultra DMA modes 0-6

Programmable timings for PIO and DMA modes

Support for Ultra DMA pause and termination

Standard slave Wishbone interface to microprocessor/microcontroller

Interrupt generator for IRQ driven software driver implementation

Transparent (pass through) access from processor interface to device task registers

DMA engine and master Wishbone interface for data transfer

Small register FIFOs for transmit and receive data

Details

Category

Portability

Process Node

Type

Maturity

Market Category

Bus Interface

QIP Rating

IP Catalog : Digital Core IP : Controllers : Disk
IP Catalog : Digital Core IP : Controllers : Peripheral
IP Catalog : Digital Core IP : Controllers : Storage

ASIC, FPGA, Structured

250nm

Soft IP

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Automotive Communications Consumer Electronics Data Processing Industrial and Medical Military/Civil Aerospace Others

WISHBONE, AHB, OPB, PLB, OCP and AVALON

This IP is not yet QIP rated.

Vendor

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