Bi-directional High-speed LVDS IO with LVCMOS input

Silicon Creations

Bi-directional High-speed LVDS IO with LVCMOS input

• IP Catalog : Off-Chip Interface IP : Bus Interface IP : LVDS
• IP Catalog : Off-Chip Interface IP : I/O Libraries : Specialty I/O

• Complies with TIA/EIA-644-A-2001 LVDS standard
• Input/output up to 2Gbps (1000MHz)
• Trimmable/switchable 100 ohm on-die termination resistor allows low power at low frequency and clean high frequency signals
• LVCMOS input function with hysteresis
• Low area – 120u X 300u
• Designed to work with standard ANIO pads and power supply padcells
• Uses external bandgap for Tx biasing

• GDSII
• Calibre LVS Netlist
• Behavioral Verilog Model with true loop dynamics and jitter
• LEF Footprint, LIBERTY Timing Models
• Detailed Application Note