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ChipScope OPB IBA

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Xilinx
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IP Name
ChipScope OPB IBA
Provider

Xilinx

Description

ChipScope OPB IBA

Category
Portability
FPGA
Type
Soft IP
Maturity
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Overview
The ChipScope OPB IBA core is a specialized Bus Analyzer core designed to debug embedded systems containing the IBM CoreConnect On-Chip Peripheral Bus (OPB). The ChipScope OPB IBA core in EDK is based on Tcl script that generates a HDL wrapper to the OPB IBA and calls the ChipScope Core Generator to generate the netlist based on user parameters.
Features
  • Multiple Match Units for Trigger and Data capture
  • Each Match Unit can be enabled and configured independently
  • The Match Units for the OPB IBA are - OPB Control signald, OPB Address Units, OPB Data Unit (combined), OPB Read/Write Data Units, OPB Protocol Violation Unit, OPB Master Units (based on no. of masters), OPB Slave Units (based on no. of slaves)
  • Generic Trigger/Data Unit with selectable width
Market Category
Automotive, Communications, Consumer Electronics, Data Processing, Industrial and Medical, Military/Civil Aerospace, Others
Datasheet
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Gate Count
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QIP Rating  This IP is not yet QIP rated.
 
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