The Advanced Encryption Standard (AES) is in widespread use now in standards such as 802.11i, WiMax, SSL, IPSec SRTP, Suite B and many other applications. This diversity of applications generates different performance requirements, modes of operation and key size selection for each target application. The CLP-45 Configurable AES Core allows designers to select a core that is optimized for the target requirement in both features and gate count. The core is proven in multiple tape-outs ranging down to 65 nm and is fully verified under the NIST CAVP (Crypto Algorithm Validation Program).
Features
Configurable AES look-aside core with support for cipher modes
---- ECB, CBC, CTR and f8
Support for authenticating cipher modes CCM and GCM
Features cipher based message authentication counters:
--- CMAC (compliant with NIST Special Publication SP 800-38b
--- XCBC (1 key variant as described in RFC 3566)
--- XCBC (3 key variant as proposed by Rogaway and Black)
Multiple performance options to tune throughput versus gate count:
Hardware key expander
Deliverables
HDL Source Licenses:
Verilog HDL
Testbench
Sample synthesis script
• Documentation
Market Category
Automotive, Communications, Consumer Electronics, Data Processing, Industrial and Medical, Military/Civil Aerospace, Others