IBM 65nm Mini-LVDS Transmitter

Estimate your chip with this semiconductor IP

VeriSilicon

IP Name

I65GV25_MINILVDSTX_01

Provider

VeriSilicon

Description

IBM 65nm Mini-LVDS Transmitter

Category

IP Catalog : Analog & Mixed Signal IP : Other

Portability

ASIC

Process Node

65nm/Common Platform

Type

Hard IP

Maturity

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Overview

The Mini-LVDS transmitter converts up to 64-bit CMOS data into 16-pairs of Mini-LVDS data stream that can support Single-Link transmission with up to SXGA+ resolution, or Dual-Link transmission with up to UXGA resolution. This IP is suitable for Flat Panel Display applications.

Features

Process: IBM 65nm 1.0V/2.5V cmos10sf, support metal option (TBD)

Logic input: total 64-bit data inputs, clock trigger edge selectable

Mini-LVDS output: Single-Link or Dual-Link; 8-channel data + SP + clock for each link

Clock freq: input 70M ~ 250MHz, output 140M ~ 500MHz (data mux 4:1)

Output data rate: max 1Gbps per channel

VOD and VCM adjustable

Link skew and channel skew adjustable

On-chip DLL supports SSC clock of central spread +/-5%, <150kHz

Individual power-down control for each link

More details, please go to below website to contact VeriSilicon location sales : http://www.verisilicon.com/en/contactus.asp

Market Category

Automotive, Communications, Consumer Electronics, Data Processing, Industrial and Medical, Military/Civil Aerospace, Others

Datasheet

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Size

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QIP Rating

This IP is not yet QIP rated.

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