The DesignWare® AEON/MTP RFID is true multiple time programmable NVM in a standard logic CMOS process with no additional masks or process steps. The RFID architecture is targeted at ultra low power applications, specifically EPC Gen2 passive tags.
Features
Logic based multiple time programmable nonvolatile memory with no extra masks or processing steps
Temperature range from -40 - 85C
Bit count range from 64 bits to 1k bits
Up to 10,000 write-erase cycles
10-year data retention
Single supply operation
Row-column addressable
Fully integrated HV and control circuitry
Read operation down to 1.0V
Deliverables
Front-end views (datasheet, Verilog behavioral model, test bench, .lef)
"Developing the [USB] IP internally was never an option for us because it is not our core competency. Compared to other IP vendors we evaluated, Synopsys DesignWare USB 2.0 nanoPHY was 30% lower in area and up to 15% lower in power. It was one of the smallest PHYs we found. "