The Helion Standard AES cores suit a large number of applications, where they offer higher encryption throughput capabilities than the Helion Tiny AES core family coupled with the advantage of their small size. They have been carefully designed to require the absolute minimum of logic resource in Xilinx FPGA, whilst maintaining encryption throughput capabilities within the widely used 100 Mbps to 1 Gbps range. The Helion Standard AES cores were designed using a building block approach with the ultimate user flexibility in mind. The cores offer both encryption and decryption functions plus key expansion support for any or all of the AES key sizes (128/192/256-bit). Helion was the very first company in the world to offer commercial AES IP solutions in 2001, and as such our cores are extremely well proven in numerous FIPS certified real-world products. The cores are highly versatile and extremely simple to use, and so can be integrated into any AES design requirement with minimum effort.
Implements AES (Rijndael) to NIST FIPS PUB 197
Full dynamic support for all AES key sizes (128, 192 and 256 bits)
Separate encryption, decryption and key expansion building blocks for maximum system flexibility