The RI-LDPC-CCSDSC2-ENC is a high performance and high quality HDL IP LDPC Core fully compliant with CCSDS 131.1-O-2 specifications for LDPC use in Near-Earth Applications. It is suitable for easy integration within the complete CCSDS PHY layer.
The RI-LDPC-CCSDSC2-ENC has been optimized for Near-Earth Applications giving very high data rates and LDPC code high reliability. Our innovative generic architecture implements encoder which allows any data rate with very low latency.This core can generate LDPC (8176,7154) code or shortened (8160,7136) code. Both high rate (R=7/8) codes are fully compliant with CCSDS 131.1-O-2 specifications.
The encoder design is fully synchronous on an input system clock. Moreover, this system clock is uncorrelated with sample clock. Generic VHDL code has been optimized for both FPGA and ASIC by restricting silicon resources and providing high performances.
Any data rate supported
1 clock cycle latency
Fully synchronous on input system clock
Sample clock and system clock uncorrelated
Optimized VHDL code for both FPGA and ASIC
Easy integration (Matlab, SystemC, VHDL models)
Fixed and floating point software model; System C model
Customization and on-site support can be provided on demand for Asic integration or any other target adaptation