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USB 2.0 PHY Interface I/O Library (Designed for Common Platform 65LPE)

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Aragio Solutions
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IP Name
USB2.0_IO
Provider

Aragio Solutions
Description

USB 2.0 PHY Interface I/O Library (Designed for Common Platform 65LPE)
Categories
Portability
ASIC, FPGA, Structured
Process Node
65nm/Common Platform/LPE    
Type
Hard IP
Maturity
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Overview
A Universal Serial Bus (USB 2.0 analog transceiver) bidirectional I/O Macro Cell with dedicated isolated power supplies
Market Category
Automotive, Communications, Consumer Electronics, Data Processing, Industrial and Medical, Military/Civil Aerospace, Others
Datasheet
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Bus Interface
USB 2.1
Size
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QIP Rating  This IP is not yet QIP rated.
 
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Keywords
Node
28nm      40 nm      55 nm      90 nm      150 nm      250 nm     
32nm      45 nm      65 nm      130 nm      180 nm      350 nm     
Foundry
Common Platform
GLOBALFOUNDRIES
IBM
 SilTerra
SMIC
TSMC
 Tower
UMC
X-FAB
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Category
Vendor
Portability
ASIC FPGA Structured
IP Quality
QIP Rated

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