Ultra-low Power Asynchronous 16-bit Microcontroller Core

Tiempo

Ultra-low Power Asynchronous 16-bit Microcontroller Core

• IP Catalog : Digital Core IP : Microcontrollers : CISC

• 16-bit microcontroller core with power-efficient instruction set
• Software development kit (with assembler, linker, instruction set simulator and debugger)
• Embedded peripherals including: 1 UART, 3 Cascadable Timers, Interrupt Controller for vectorized interrupt handling, 16-bit Programmable Input/Output (PIO), Boot pins for boot configurations
• Two memory interfaces: one for third-party standard ROM and RAM, with memory redundancy module to replace faulty RAM pages, one for the peripheral memory space, allowing for synchronized and non-synchronized communications
• Fully asynchronous (no clock) and delay insensitive (functional correctness guaranteed regardless of any actual delay in internal gates and wires)
• Ultra low power consumption: low energy (divide by 4 to 5), low current peaks (divide by 10 to 15), ultra low noise and ultra low electromagnetic emission (EMI/EMC)
• Easy-programmable, fast and energy-efficient interrupt controlling and peripheral communications
• Fast wake-up time (< 5 ns), immediate sleep-mode
• High robustness against any PVT (process, voltage, temperature) variation
• High robustness against attacks by power analysis and fault injections (for secured applications)

• Available as Verilog netlist ready for P&R (silicon-proven netlist)
• As an option: Verilog netlist secured against attacks by power analysis and fault injection
• As an option: Verilog netlist1 strengthened for ultra low noise, ultra low EMI
• Contact Tiempo for available technologies and libraries