Very low power 1 Kbit NVM in 180nm Standard Logic CMOS process (OTP/eMTP)

Estimate your chip with this semiconductor IP

Sidense

IP Name

SLP-1Kbit -180-GII-UMC

Provider

Sidense

Description

Very low power 1 Kbit NVM in 180nm Standard Logic CMOS process (OTP/eMTP)

Categories

IP Catalog : Digital Core IP : Memories : Non-volatile RAM

IP Catalog : Digital Core IP : Memories : EEPROM

IP Catalog : Digital Core IP : Memories : eFuse

Portability

ASIC, Structured

Process Node

180nm/UMC/UMC 180 GII

Type

Hard IP

Maturity

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Overview

Emulated multiple-time (eMTP) or one-time programmable (OTP), very low power memory IP available in a standard logic CMOS process requiring no additional masks or process steps. SLP non-volatile memory (NVM) IP is available in a wide range of configurations for a broad range of low-power, cost-sensitive applications including encryption and security keys, IDs, flash replacement, RFID, code storage, digital rights management (including HDMI) and analog trimming.

Features

No Additional Masks or Process Steps

Very Secure & Reliable

Low Voltage Operation

Access Time Down to 50ns (30ns in Differential Mode)

Secure Program Lock Function

>20 Years Retention

Programmable on Tester, at Wafer Probe, or in the fFeld

Very Low Power - Up to 80% Less than Competitive OTP Products

Very Small Area

Wide I/O Width: 1 to 128 bits

Deliverables

GDS Database

Verilog Models

.lib files

Full Data Sheet

Market Category

Automotive, Communications, Consumer Electronics, Industrial and Medical

Datasheet

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Bus Interface

Serial/Parallel

Size

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QIP Rating

This IP is not yet QIP rated.

Customer Testimonial

"ParkerVision selected the SiPROM architecture for its small size, low power, and speed of programming. We had need for onboard memory and wanted to add some programmability for future features without compromising on our existing size and cost targets. Because our product is used in mobile handsets, power and form factor are paramount. The excellent support received from Sidense has helped us realize first-pass silicon success. "

Domingo Figueredo, VP of Engineering
ParkerVision

View More Testimonials

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