XPS BRAM Controller
XPS BRAM Controller
Overview:

The XPS BRAM Interface Controller is a Xilinx IP module that incorporates a PLB V4.6 (Processor Local Bus) interface. This controller is designed to be byte accessible. Any access size (in bytes) up to the parameterized data width of the BRAM is permitted. The XPS BRAM Interface Controller is the interface between the PLBV46 and the bram_block peripheral.

Features

PLB V4.6 bus interface with byte enable support
Supports up to three transfer types
Used in conjunction with Xilinx EDK generated bram_block peripheral to provide total BRAM memory solution

Details

Category

Portability

Process Node

Type

Maturity

Market Category

QIP Rating

IP Catalog : Other

FPGA

Soft IP

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Automotive Communications Consumer Electronics Data Processing Industrial and Medical Military/Civil Aerospace Others

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