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Four Channel LVDS Serializer/Transmitter IP

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Mixel
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IP Name
MXL-SR-LVDS
Provider

Mixel

Description

Four Channel LVDS Serializer/Transmitter IP

Categories
Portability
ASIC
Process Node
130nm/TSMC
Type
Hard IP
Maturity
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Overview
The MXL-LVDS-TX-4CH is a high performance 4-channel LVDS Transmitter implemented using digital CMOS technology. Both the serial and parallel data are organized into four channels. The parallel data can be 7 or 10 bits wide per channel. The input clock is 25MHz to 165MHz. The transmitter is highly integrated and requires no external components. It employs optional preemphasis to enable transmission over a longer distance while achieving low BER. The circuit is designed in a modular fashion and desensitized to process variations. This facilitates process migration, and results in a robust design.
Features
  • 25-165 MHz clock support
  • Up to 1.25 Gbps bandwidth
  • Low power CMOS design
  • LVDS for low EMI
  • PLL requires no external components
  • Core Voltage & 3.3V dual power supply
  • Optional transmit pre-emphasis
  • 7/10 bit programmable serial data transmitted per pixel clock per cannel
  • Rising/falling edge data strobe
  • Compatible with TIA/EIA-644 LVDS Standard
Deliverables
  • GDSII
  • LVS netlist
  • LEF file
  • Verilog Model
  • Timing Model
Market Category
Communications, Consumer Electronics
Datasheet
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Bus Interface
LVDS
Size
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QIP Rating  This IP is not yet QIP rated.
Customer Testimonial

"Mixel and Northwest Logic's leadership position in the MIPI IP's PHY and Controller markets respectively, was one of the factors that influenced our decision. The firstsilicon success and the outstanding support that we have received during multiple tape-outs validated this important choice. We're looking forward to a long-term collaboration with both companies. "

Yusuke Yamamoto, Senior Manager, Mkt & Strategic Planning Dept
Kawasaki Microelectronics

 
 
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