CEVA-TeakLite DSP Core is a low power, single Multiply- Accumulate (MAC), 16- bit, Fixed point DSP Core, designed specifically to be embedded in highly integrated Systemon- Chip (SoC) applications. It provides various resources for customization and differentiated configuration such as program and data memory size and type (e.g. RAM, ROM Flash etc), interfaces to DSP related peripherals (DMA, Timer, etc.) and other system interfaces.
CEVA-TeakLite is assembly and binary compatible with its predecessor DSP generation, the widely adopted CEVA-Oak DSP Core, providing leverage on the large installed base of legacy software available for this product and migrate it to higher performance DSP.
The CEVA-TeakLite Core has an advanced set of Digital Signal Processing instructions as well as general microprocessor functions. The core's programming model and instruction set are designed for straightforward generation of efficient and compact code composed of 16-bit width instructions.
Soft core (process and library-independent)
Available also as a Hard Macro
Low power consumption
Active mode - using full DSP capability
Slow mode - clock speed and current consumption, linearly divided, relative to active mode by a user-defined factor
Stop mode - leakage current only
Fully Static Design. Cool CEVA-TeakLite version - optimized for very low power consumption.
Fully synthesizable RTL, including synthesis and layout scripts and guidelines
Complete set of SW and HW development tools
Automotive, Communications, Consumer Electronics, Data Processing, Industrial and Medical, Military/Civil Aerospace, Others