Capitalizing on its long-term experience with JPEG 2000 hardware coding, Barco Silex has extended its JPEG 2000 portfolio by releasing a real-time hardware encoder engine that is optimized for Digital Cinema and Broadcast video applications.
The core architecture offers a flexible and high-speed solution to the performance challenges of cinema, broadcast and post-production applications. It is able to sustain the high encoding requirements of the large DCI frame formats, including 4096x2160 (4K) resolution and frame rates up to 48 frames per second.
The BA110 IP core is a JPEG 2000 hardware encoder dedicated to DCI (Digital Cinema Initiatives) and HD video applications. It applies JPEG 2000 encoding on un-tiled large color frames with 4:4:4, 4:2:2 or 4:2:0 color resolutions. It generates streams compliant with the ISO/IEC 15444-1 specification (JPEG 2000).
The core performs the following video compression operations of the normalized encoding process: color transform (ICT/RCT), discrete wavelet transform (DWT), quantization, entropy encoding and rate allocation. It expects pixels under the following format at its input interface: 4:4:4, 4:2:2 or 4:2:0 color resolutions with 12-bit samples. It generates a j2c JPEG 2000 stream at its output interface. In case of 4:4:4 operation this stream is DCI compliant.
The core is optimized for speed and is able to deal with the demanding DCI and HD processing speeds: it is able to provide a single-chip FPGA solution for all 2K @24 fps, 2K @48fps, 2K @60fps, 4K @24fps, 720p30/60, 1080i and 1080p30/60 distributions. The flexible FPGA architecture allows the user to build a secure encoder by integrating Barco Silex cryptography encoders (DCI AES).
Features
Multi-channel HD
Compliant with DCI (Digital Cinema Initiatives) recommendation
Compliant with JPEG 2000 (ISO/IEC 15444-1)
Integrated Intellectual Property (IP) core offering a full FPGA solution for HD and DCI JPEG 2000
Customizable output bit rate up to 250 Mbps / 500 Mbps / 1+ Gbps / lossless
XYZ, RGB, YUV (4:4:4 or 4:2:2) color spaces with support for ICT/RCT color transformV
Supported for a large range of encoding parameters
Fully synchronous design
Can be used for FPGA, ASIC and Structured ASIC technologies
Minimal user intervention
Deliverables
RTL code or netlist (depending on license type)
Functional simulation testbench
Synthesis script
Full documentation
Market Category
Communications, Data Processing, Industrial and Medical, Military/Civil Aerospace, Others