PLL - TSMC CLN65LP 65nm General Purpose PLL - 120MHz-600MHz

True Circuits

PLL - TSMC CLN65LP 65nm General Purpose PLL - 120MHz-600MHz

• IP Catalog : Analog & Mixed Signal IP : Clock : Clock Synthesizer
• IP Catalog : Analog & Mixed Signal IP : Clock : PLL
• IP Catalog : Off-Chip Interface IP : Embedded I/O Cores : PLL

• - Designed as a wide range clock multiplier with deskew capability.
• - Delivers optimal jitter performance over all multiplication settings.
• - Low area and Low power.
• - Suitable for system clock, DDR and general purpose applications.
• - Ideal for cost sensitive applications.

• - GDSII (100% DRC and LVS clean)
• - LVS Spice netlist
• - Verilog model
• - Synopsys synthesis model
• - LEF for clock generator PLL