The Multiply Adder IP performs a multiplication of two operands and adds (or subtracts) the full-preciison product to a third operand.The Multiply Adder IP is implemented using Xtreme DSP™ slices and operates on signed or unsigned data.
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IP Catalog : Digital Core IP : DSP : Other
FPGA
Soft IP
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Automotive Communications Consumer Electronics Data Processing Industrial and Medical Military/Civil Aerospace Others
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