The ARM® Artisan® DDR3/2 Physical Memory Interface (PHY) is a drop-in hard macro which minimizes die size, speeds time-to-market, and reduces risk. The hard macro is implemented as a flexible pad ring configuration, enabling optimal pad ring placement and die area optimization. The 1066Mbps DDR2 or 1600Mbps capable DDR3 interface reduces design time with its JEDEC-compliant DDR signaling and industry standard DFI interface, enabling seamless integration with DDR memory controllers and SDRAM chips. The DDR3/2 Physical Interface is designed with a robust ESD architecture and PVT compensation. The Artisan DDR3/2 PHY maintains high signal integrity, low jitter, and superior noise rejection in a complete silicon-proven design, providing SoC designers with a flexible, low risk, drop-in DDR PHY solution.
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