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XPS IIC Bus Interface

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Xilinx
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IP Name
XPS IIC Bus Interface
Provider

Xilinx
Description

XPS IIC Bus Interface
Categories
Portability
FPGA
Type
Soft IP
Maturity
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Overview
This product specification defines the architecture, hardware (signal) interface, software (register) interface and parameterization options for the XPS IIC module. It provides a low speed, two wire, serial bus interface to a large number of popular devices.
Features
  • Master or slave operation
  • Multi-master operation
  • Software selectable acknowledge bit
  • Arbitration lost interrupt with automatic mode switching from master to slave.
  • Calling address identification interrupt with automatic mode switching from master to slave
  • START and STOP signal generation/detection
  • Repeated START signal generation
  • Acknowledge bit generation/detection
  • Bus busy detection
  • Fast mode 400 KHz operation or standard mode 100 KHz
Market Category
Automotive, Communications, Consumer Electronics, Data Processing, Industrial and Medical, Military/Civil Aerospace, Others
Datasheet
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Gate Count
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QIP Rating  This IP is not yet QIP rated.
 
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