The LogiCORE™ IP Media Oriented Systems Transport Network Interface Controller (MOST NIC) core is a controller designed to the MOST Specification revision 2.4. When combined with the Xilinx Automotive (XA) solution and embedded processing, the MOST NIC core allows to take advantage of the MOST open standard network by providing a higher level of customization in a scalable, flexible design solution.
Operates in both master and slave modes
Full bandwidth sustained transfers (24 Mbps)
Supports full control channel bandwidth utilizing two transmit and receive buffers
Synchronous, asynchronous, and control channels with 4 to 60 bytes of synchronous data per frame
Flexible user interfaces 32 bit PLB interface allows use in Xilinx EDK
LocalLink-based streaming port for real-time data access
Physical to logical channel mapping performed in hardware with 16 transmit and 16 receive logical channels.
Automotive, Communications, Consumer Electronics, Data Processing, Industrial and Medical, Military/Civil Aerospace, Others