PLL - GF/CP L28SLP 28nm Low bandwidth PLL - 320MHz-1600MHz

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True Circuits

IP Name

TCI-CL28SLP-LBHPLL

Provider

True Circuits

Description

PLL - GF/CP L28SLP 28nm Low bandwidth PLL - 320MHz-1600MHz

Categories

IP Catalog : Analog & Mixed Signal IP : Clock : Clock Synthesizer

IP Catalog : Analog & Mixed Signal IP : Clock : PLL

IP Catalog : Off-Chip Interface IP : Embedded I/O Cores : PLL

Portability

ASIC, FPGA, Structured

Process Node

28nm/Common Platform/L28SLP

Type

Hard IP

Maturity

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Overview

The Low Bandwidth PLL is designed to multiply an input clock by a fixed-point number between 1 and 16 with a low adjustable loop bandwidth. It does not provide any deskew functionality. The low loop bandwidth provides filtering of reference input jitter. It contains a 1-16 divider at the reference clock input, a 1-16 integer divider and a 1-256 fractional divider in the internal feedback path, and a 1-8 divider at the output. The loop bandwidth is inversely controllable with a relative range of 1-256. The outputs are 50% duty cycle for all output divider values.

Features

- Designed to address the problem of excessive system clock jitter originating from lower-quality crystals.

- an adjustable bandwidth allows the designer to dial-in the desired amount of period jitter filtering. the bandwidth is adjustable as a precise fraction of the reference frequency.

- Feedback divider with 8 fractional bits allows the frequency to be set more precisely when the bandwidth is reduced.

Deliverables

- GDSII (100% DRC and LVS clean)

- LVS Spice netlist

- Verilog model

- Synopsys synthesis model

- LEF for clock generator PLL

Market Category

Automotive, Communications, Consumer Electronics, Data Processing, Industrial and Medical, Military/Civil Aerospace, Others

Datasheet

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Protocols

Bluetooth
DDR2
DDR3
DDR4
DigRF
DSL
Ethernet
FibreChannel
HDMI
HyperTransport
Infiniband
PCI
RapidIO
SATA1.0
SATA2.0
SATA3.0
SCSI
SPI-4.1
SPI-4.2
USB1.1
USB2.0
WiMax

Size

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QIP Rating

This IP is not yet QIP rated.

Customer Testimonial

"Our mission is to provide predictable, reliable and cost-effective ASIC solutions, while reducing risk at each step of the process and improving time-to-market. True Circuits PLLs and DLLs are feature rich, easily integrated and well supported, helping us to deliver quality analog IP and faster design implementations to our ASIC customers. "

Hans Bouwmeester, Director of IP
Open-Silicon, Inc.

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