Multi-Packet Manager Security Engine

Estimate your chip with this semiconductor IP

Elliptic Technologies

IP Name

CLP-630 SPAcc-MPM

Provider

Elliptic Technologies

Description

Multi-Packet Manager Security Engine

Categories

IP Catalog : Digital Core IP : Security : Decryption

IP Catalog : Digital Core IP : Security : Encryption

IP Catalog : Digital Core IP : Security : Other

Portability

ASIC, FPGA, Structured

Process Node

all

Type

Soft IP

Maturity

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Overview

The Multi-Packet Manager is a highly programmable and unique Security Protocol Accelerator specifically designed to efficiently process data for high capacity wireless and network applications. The engine is perfectly suited for applications that deal with multiple active connections and significant traffic load on different contexts, such as 4G LTE-Advanced wireless cellular base stations and femtocells.

The Multi-Packet Manager significantly reduces the CPU and software loads, and improves system level latencies via autonomous packet processing and automated key caching mechanisms. The Multi-Packet Manager allows the host processor to dynamically add network packets to be processed while the security engine is busy processing data. Intelligent caching and pre-fetching reduces the bus traffic, internal buffering and power consumption without increasing the software load in a system.

The Multi-Packet Manger can be preconfigured to match the customer's system requirements. The engine reduces the CPU interrupt impact by allowing interrupts to be issued at the end of the packet list, after a specific number of packet descriptors have been processed, and on demand.

Features

Highly efficient processing of small packets from different data streams

Autonomous packet processing

Automated key caching

Small internal buffering

Low CPU interrupt impact

Low software interaction with the engine

Lower system level latencies

Highly configurable security accelerator

Support for all ciphers, hashes and MAC algorithms used in major protocols such as IPSec, WiMAX, Wi-Fi, 3GPP LTE/LTE-A, SRTP, SSL/TLS/DTLS, MACsec

Optimal bus utilization

Deliverables

Verilog HDL

Testbench

Sample synthesis script & constraints

Sample simulation script

Documentation

Market Category

Automotive, Communications, Consumer Electronics, Data Processing, Industrial and Medical, Military/Civil Aerospace, Others

Datasheet

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Bus Interface

AMBA AXI, AHB

Gate Count

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QIP Rating

This IP is not yet QIP rated.

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