USB VIP in native SystemVerilog (UVM/OVM/VMM)

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Avery Design Systems

IP Name

USB-Xactor

Provider

Avery Design Systems

Description

USB VIP in native SystemVerilog (UVM/OVM/VMM)

Type

Verification IP

Simulator

NC, VCS, Questa

Supported Language

SystemVerilog UVM/OVMVMM

Protocols

USB1.1
USB2.0
USB3.0

Design Category

Peripherals: General Purpose

Maturity Status

Released

Overview

USB-Xactor is a widely proven solution enabling SoC and IP developers to perform comprehensive functional verification of their USB device and hub designs and ensure compliance to the USB-IF USB 2.0/3.0 and OTG/OTG 3.0 standards. The solution consists of BFMs, compliance testsuites, protocol checking, functional coverage monitors, and producer-consumer scoreboard. BFM components and testsuites are all provided in SystemVerilog OVM/UVM/VMM in partial or full source code format. The BFMs support complex traffic sequence generation and all-layer error injection to verify normal and error behvaiors. Compliance testsuites support the USB-IF USB 2.0 and 3.0 compliance test specifications and checklists and additional protocol checking provided by Avery. Compliance verification services are also available from Avery.

Features

Comprehensive support for USB 3.0/2.0, OTG 3.0/OTG, and PIPE-PHY including BFMs for generic USB host, device, hub, PIPE-PHY

Complex traffic sequence generators for normal and error scenarios

Robust API to program complex and random BFM request/response timing and operational behaviors and error injection

Producer-Consumer scoreboard performs end2end verification and protocol checking

Comprehensive compliance solution for Device and Hub including complete compliance testsuites including directed and constrained random testsuites

Supports all verification methodologies including VMM, OVM, UVM

Extensive protocol Checking based on USB-IF compliance test specificatins and extensive Avery based compliance checklist assertions

Packet and symbol tracker monitors output and improves debug

Models and test suites licensed in SystemVerilog partial or full source code formats

Proven with multiple IP vendors

Deliverables

BFM components, Producer-Consumer scoreboard

Complaince testsuites in source code format

Compliance checklist test plan

User Guide

Market Category

Consumer Electronics

Datasheet

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Bus Interface

USB

QIP Rating

This IP is not yet QIP rated.

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