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OTP/eMTP: 256 Kbit NVM in 90nm Standard Logic CMOS process

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Sidense
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IP Name
SiPROM_SMIC90G25_2Kx128_4S4Y2_AG
Provider

Sidense
Description

OTP/eMTP: 256 Kbit NVM in 90nm Standard Logic CMOS process
Categories
Portability
ASIC, Structured
Process Node
90nm/SMIC/G
Type
Hard IP
Maturity
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Overview
OTP (One-Time Programmable) or eMTP (Emulated Multiple-Time Programmable) memory IP available in a standard logic CMOS process requiring no additional masks or process steps. Replacement for eFuse, Flash and mask ROM. Non-volatile memory (NVM) IP is available in a wide range of configurations (8Kbits to several Mbits) for a broad range of analog and digital applications including encryption and security keys, IDs, code storage, digital rights management (including HDMI) and analog trimming.
Features
  • No Additional Masks or Process Steps
  • Very Secure & Reliable
  • Low voltage operation
  • Access times down to 10ns
  • Secure Program Lock Function
  • >20 years Retention
  • Programmable on Tester, at Wafer probe, or in the Field
  • Low power
  • Very Small Area
  • Wide I/O width 8 to 128 bits
Deliverables
  • GDS Database
  • Verilog Models
  • .lib files
  • Full Data Sheet
  • Application Notes
Market Category
Automotive, Communications, Consumer Electronics, Industrial and Medical, Military/Civil Aerospace, Others
Datasheet
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Bus Interface
Serial/Parallel
Size
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QIP Rating  This IP is not yet QIP rated.
Customer Testimonial

"The protection of media content is an important feature of our product line. We found that the technology represented by the Sidense 1T-OTP memory IP was the best available for implementing the level of security that we and our customers require. "

Steve Musallam, Vice President of Product Marketing
Magnum Semiconductor
 
 
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NVM-512Kbit-65nm-GP-TSMC OTP/eMTP 512 Kbit NVM in 65nm Standard Logic CMOS process
NVM-512Kbit-65nm-LP-TSMC OTP/eMTP: 512 Kbit NVM in 65nm Standard Logic CMOS process
NVM-64Kbit-90nm-G-TSMC 64 Kbit NVM in 90nm Standard Logic CMOS process OTP/eMTP
 
 
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Node
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