MIPI Compliant Transceiver IP

Estimate your chip with this semiconductor IP

Mixel

IP Name

MXL-TXRX-MIPI

Provider

Mixel

Description

MIPI Compliant Transceiver IP

Category

IP Catalog : Off-Chip Interface IP : Bus Interface IP : LVDS

Portability

ASIC

Process Node

130nm/GLOBALFOUNDRIES

Type

Hard IP

Maturity

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Overview

The MXL-TXRX-MIPI is a high-frequency low-power, low-cost, source-synchronous, physical Layer compliant with the MIPI Alliance Standard for D-PHY. Although it is primarily used for connecting cameras and display devices to a cost processor, it can also be used for many other portable applications. It is used in a master-slave configuration. High-Speed signals have a
low voltage swing, while Low-Power signals have large swing. High-Speed functions are used for High-Speed Data traffic while low power functions are mostly used for control.

Features

Complies with MIPI Standard for D-PHY

Point-to-point differential interface supporting multiple data lanes and a clock lane

Supports both high speed and low-power modes

Data lanes support both bidirectional & unidirectional modes

Clock lane supports unidirectional communication

80 Mbps to 1Gbps data rate in high speed mode

10 Mbps data rate in low-power mode

Modular design to allow for all possible configuration

Low power dissipation

Market Category

Others

Datasheet

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Size

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QIP Rating

This IP is not yet QIP rated.

Customer Testimonial

"Mixel and Northwest Logic's leadership position in the MIPI IP's PHY and Controller markets respectively, was one of the factors that influenced our decision. The firstsilicon success and the outstanding support that we have received during multiple tape-outs validated this important choice. We're looking forward to a long-term collaboration with both companies. "

Yusuke Yamamoto, Senior Manager, Mkt & Strategic Planning Dept
Kawasaki Microelectronics

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