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BCH Error Correction and Detection

BCH Error Correction and Detection

Overview:

The Bose-Chaudhuri-Hochquenghem (BCH) Error Correcting Code (ECC) is a complete BCH Encoder and Decoder IP core that is implemented over GF(13). The IP core includes two independent units, a parallel BCH Encoder for the generation of the BCH code and an independent BCH Decoder IP core based on Syndromer, Berlekamp-Massey, Chien Search and Error Correction units. The encoder and all the decoder units can be used separately or together.

Features

High throughput

Highly efficient and area optimized implementation for Chien search

Based over GF (13) and available on GF(14)

Programmable error correction values of (t) upto 55

Configurable to support any value for t

Configurable error correction polynomial

Support 512 bytes of information (k)

Configurable to support any value for k

Parallel and highly optimized BCH Encoder

Can be customized to meet data rate and area requirements

Details

Category

Portability

Process Node

Type

Maturity

Market Category

Protocols

QIP Rating

IP Catalog : Digital Core IP : Communications : Error Correction/Detection
IP Catalog : Digital Core IP : Memories : Flash
IP Catalog : Digital Core IP : Communications : Wireless : WiMAX

ASIC, FPGA

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Soft IP

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Communications Data Processing Military/Civil Aerospace Others

AMBA 4.0 AHB

This IP is not yet QIP rated.

Vendor

Open-Silicon, Inc., a leading semiconductor design and manufacturing company and founding membe

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