SHA Engine

Estimate your chip with this semiconductor IP

Open-Silicon

IP Name

SHA Engine

Provider

Open-Silicon

Description

SHA Engine

Category

IP Catalog : Digital Core IP : Security : Authentication

Portability

ASIC, FPGA

Process Node

all

Type

Soft IP

Maturity

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Overview

The SHA Engine is a dedicated hardware accelerator that calculates the hashing function (or the message digest) for given byte oriented data or message. The HASH-1010 supports both PIO and DMA mode of operation. The HASH-1010 implements the most widely used hashing algorithms SHA-1, SHA-2(256) and MD5 in a single IP core. The support for the multiple modes makes the SHA engine particularly suitable for implementation of internet security protocols, such as IPSec that requires multiple authentication algorithms. The input data is padded according the specific requirement of the hashing algorithm and endian-conversion is performed in the hardware.

Features

SHA-1, SHA-2(256) and MD5

Compliant to FIPS 180-2 specifications

Compliant to MD5 RFC 1321 specifications

Message pre-processing, data framing and endian conversion done autonomously as per specification

Full Duplex, 2-channel DMA

Scatter-gather operations supported

Market Category

Automotive, Communications, Consumer Electronics, Data Processing

Datasheet

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Protocols

AMBA 2.0 AHB

Gate Count

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QIP Rating

This IP is not yet QIP rated.

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