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GF13V33_USB20PHY_04B

GF13V33_USB20PHY_04B

Overview:

The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB analog front-end with a build-in 8-bit/16-bit parallel interface, therefore, it is easy to interface with USB2.0 Device System. It can work either as a host PHY or as a device PHY, depending on the different setting from controller.

Features

Compliant with the USB Spec Rev2.0

Compliant with the UTMI Spec Rev1.05

Supports 480Mbit/s "High Speed" and 12Mbit/s "Full Speed"

Supports 60MHz/8-bit interface and 30MHz/16-bit interface

12MHz/24MHz external crystal, internal oscillator and PLL are used for generating high-speed internal clock and CLKOUT output

Internal terminations include 1.5Kohm pull-up resistor switching on DP/DM in the FS mode and the HS chirp mode

Clock and data recovery from serial stream on the USB bus

Supports detection of USB reset, suspend, resume and remote-wake-up features

Supports the test modes defined in the USB2.0 Specification

More details, please go to below website to contact VeriSilicon location sales : http://www.verisilicon.com/en/contactus.asp

Details

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QIP Rating

IP Catalog : Analog & Mixed Signal IP : USB PHY

ASIC

110nm/GLOBALFOUNDRIES

Hard IP

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Automotive Communications Consumer Electronics Data Processing Industrial and Medical Military/Civil Aerospace Others

This IP is not yet QIP rated.

Vendor

Founded in 2001, VeriSilicon Holdings Co., Ltd. ("VeriSilicon") is a fast growing silicon solut

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