Ethernet 1/10/1G/40G/100Gb VIP

Estimate your chip with this semiconductor IP

Cadence

IP Name

VIP, Ethernet

Provider

Cadence

Description

Ethernet 1/10/1G/40G/100Gb VIP

Type

Verification IP

Simulator

3rd Party

Supported Language

e, SV

Protocols

Ethernet
FibreChannel
IEEE_802.11b
IEEE_802.11g
IEEE_802.11n

Design Category

Bus: Off Chip

Maturity Status

Pre-Release

Overview

The Cadence Ethernet Verification IP (VIP) provides a mature, highly capable compliance verification solution for the Ethernet Protocol. Used on multiple production designs, the ETHERNET VIP is applicable for IP, SoC, and system-level verification. The VIP is compatible with the industry standard Universal Verification Methodology (UVM) and runs on the Cadence Incisive Enterprise Simulator and also the Synopsys VCS® and Mentor Graphics Questa® simulators. The ETHERNET VIP supports the unique Compliance Management System (CMS) which provides interactive, graphical analysis of coverage results correlated with the protocol specification. IP developers Take advantage of thousands of automatic protocol checks performed by the VIP and the extensive compliance test suite. Be confident in knowing the VIP has been used in thousands of production designs. SoC developers One consistent testbench interface spans the entire Cadence VIP Catalog ensuring straightforward chip level verification. Innovative licensing makes it affordable to perform multi-protocol verification. Also compatible with the extensive Cadence Memory Portfolio for full SoC verification. Supported Configurations The Ethernet VIP includes models for both PHY and MAC devices and supports a wide range of interfaces including 10Mb, 100Mb, 1Gb and 10Gb, 40Gb and 100Gb bandwidths. It also provides support for both PHY and MAC orientations and verifies both single and multi-port Ethernet devices. Protocol Compliance The ETHERNET VIP provides a highly capable protocol compliance verification solution called the Compliance Management System (CMS). CMS includes a verification plan and a full suite of tests. It drives defined, constrained random bus traffic at all layers to offload this time consuming task from you. Injected errors and error conditions are flagged and recovered according to Ethernet specifications. The VIP's sequence generation engine applies a context-sensitive approach to test plan execution. This greatly speeds the verification task and increases verification productivity. A cumulative coverage database ensures that the design under test is sufficiently exercised. Language & Methodology Support The following languages may be used in conjunction with the VIP: - SystemVerilog - e - SystemC - Verilog - VHDL - C,C++ The following methodologies may be used in conjunction with the VIP: - UVM - OVM - VMM - eRM Take a Self-Guided Tour Test drive this VIP on-line via the hands-on demos at Xuropa.com

Features

Simplifies protocol compliance verification via automated stimulus generation and coverage reporting

Verifies both physical layer (PHY) and media access controller (MAC) designs

Supports IEEE 802.3 specifications and functionalities, such as backplane auto-negotiation and forward error correction

Enables early-adopter functionalities through support of Energy-Efficient Ethernet, Priority-Based Flow Control, and Ethernet Audio/Video standards

Supports 10Mb, 100Mb, 1Gb, 10Gb, 40Gb, and 100Gb interfaces

Built-in configurable scoreboard measures data integrity

Verifies both single- and multi-port Ethernet devices

Supports SystemVerilog,Ãƒâ€šÃ‚Â e, and SystemC language testbenches

Complies with the UVM, ensuring your environment will be plug-and-play

Supports Accelerated VIP using the Palladium platform to enable different use modes

Market Category

Communications

Datasheet

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QIP Rating

This IP is not yet QIP rated.

Customer Testimonial

"Cadence® USB 3.0 verification IP has enabled us to thoroughly verify that our designs comply with the USB 3.0 specification, and this new SSIC product demonstrates the company’s commitment to supporting engineers working with this key protocol. By supporting all popular verification methodologies and simulators, the Cadence VIP has enabled GUC to support our diverse customer base with high-quality SoC and IP verification coverage. "

James Cheng, Senior Vice President
Global Unichip

View More Testimonials

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