Broadband DAC suited for generation of radio frequency broadband signals without requiring an analog-intensive transmit chain.

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Catena

IP Name

Broadband RF Digital-to-Analog Converter

Provider

Catena

Description

Broadband DAC suited for generation of radio frequency broadband signals without requiring an analog-intensive transmit chain.

Category

IP Catalog : Analog & Mixed Signal IP : D2A Converter

Portability

ASIC, Structured

Process Node

45nm/TSMC/TSMC 45nm

Type

Hard IP

Maturity

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Overview

The 6.0 GSPS digital-to-analog converter (DAC) uses a current-steering architecture with a novel supply noise cancellation and layout matching techniques to achieve high speed operation in an area-efficient manner. The output is well suited for generation of radio frequency broadband signals without requiring an analog-intensive transmit chain. The design is optimized for L-band generation but it can be modified for generating a signal band up to 3 GHz.

The data interface between the DAC and DSP runs at one-sixth of the DAC clock, which makes the interface design easier. The DAC clock receiver takes a 6.0 GHz LVDS signal and then amplifies it for clocking the current-steering stage and other blocks. The DAC sends a 1 GHz reference clock to the front-end digital signal processor for data synchronization using a divide-by-6. The received data can be clocked at one of the six available clock phases.

The DAC takes reference currents of 50 µA and 200 µA, and has configuration bits to set the output common mode, output power of the DAC and other bias voltages. The output common-gate stage drives an external differential balun. ESD devices are present at all interfaces.

Features

DAC for near DC to 3.0 GHz band

Data serialization inside the DAC

Low power consumption

Silicon-proven in the TSMC 45/65 nm CMOS processes

9-bit, 6 GSPS

SNDR: 45 dB

Better than 47 dB IM3 at -8 dBm output power in L-band from 950 MHz to 2150 MHz

Programmable linear transmit single channel power: -45 dBm – -8 dBm

Analog output bandwidth: up to 3 GHz

1.2 V core supply and 2.5V analog output supply

Deliverables

Data sheet upon request

Hard Macro

Technology transfer

SoC integration support

Market Category

Automotive, Communications, Consumer Electronics, Data Processing, Industrial and Medical, Military/Civil Aerospace

Datasheet

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Size

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QIP Rating

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