SD3.01/SDIO 3.0/eMMC 4.51 Device Controller

Estimate your chip with this semiconductor IP

Posedge Inc.

IP Name

PE-SMID

Provider

Posedge Inc.

Description

SD3.01/SDIO 3.0/eMMC 4.51 Device Controller

Categories

IP Catalog : Digital Core IP : Controllers : Memory

IP Catalog : Digital Core IP : Controllers : Peripheral

IP Catalog : Off-Chip Interface IP : Bus Interface IP : SD

Portability

ASIC, FPGA

Process Node

all

Type

Soft IP

Maturity

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Overview

The Posedge SD 3.01 / SDIO 3.0 / eMMC4.51 Memory Device Controller (PE-SMID) is a highly configurable Device Controller compatible with SD Physical Layer Specification Version 3.01, SDIO Specification 3.0 and eMMC Specification Version 4.51. The PE-SMID controller supports SPI, SD 1, 4 bit modes and eMMC 1, 4, 8 bit modes. The Core is designed to operate at a maximum frequency of 208MHz for SD and 200MHz for eMMC. The simple and flexible interface of PE-SMID controller enables the user to integrate effectively in any SOC system or with any system bus interface. The controller supports both Boot and Alternate Boot Mode Operation.

The controller supports AHB Interface and works in DMA Mode of operation to transmit and receive data. The AHB Slave Interface provides the operational registers for Processor to configure the PE-SMID controller. This controller also adds the flexibility to connect the Flash memory with all inputs as required.

The PE-SMID Core is designed for low power, high performance,less gate count making it ideal for low-power and high-performance applications. The PE-SMID core was tested using rigorous verification methodology, consisting of directed tests, constrained random verification, and Error Injection cases.

The PE-SMID Core has a very simple firmware interface. The core comes with an optimized software programming model, allowing any customer to meet their high system performance requirement while maintaining low CPU overhead. The architecture supports all security features such as Card Lock Password protection, Write Protection and also an optional Authentication based Content Protection. Cyclic Redundancy Code (CRC) Integrity checking is handled in Hardware. CRC7 is used for Command and CRC16 is for Data Integrity.

The PE-SMID Controller is suited for a variety of applications such as:
- Mobile Phones
- HD Video
- Content Protection Recorded Media (CPRM)

Features

Compliant with SD 3.01,SDIO 3.0 and eMMC 4.51 specification

eMMC - Supports HS200 mode

Supports SD Bus Width 1-bit, 4-bit , SPI Mode and MMC Bus Width 1/4/8

Supports SDR12, SDR25, SDR50, SDR104 and DDR50 modes

Supports Replay Protected Memory Block Supports

Configurable 32-bit FIFO buffers (512B – 2kB)

Dual-Buffer mode optimizes throughput

Supports packed commands, Context ID and Data tag needed for e2MMC devices

Data Transfer Rate SD – Up to 104Mbyte/sec eMMC – Upto 200MBytes/sec

Clock support – SD - 208 MHz / MMC-200MHz AHB Clock – Up to 300MHz (process dependent)

Deliverables

Fully synthesizable RTL/Unencrypted Source Code

Self-checking Test bench and Testcases

Loopback Client Driver, SD3.0/eMMC4.51 Host Driver

Simulation Scripts –NC-Verilog, VCS, Modelsim Questasim. ASIC/FPGA synthesis scripts.

User Documentation, Integration Manual

Market Category

Communications, Consumer Electronics

Datasheet

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Bus Interface

AXI/APB/AHB

Protocols

AMBA 2.0 AHB
AMBA 2.0 APB
AMBA 3.0 AXI
DDR2
ONFI 3.0
SD

Gate Count

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QIP Rating

This IP is not yet QIP rated.

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