8051 CPU IP - Small VLSI footprint, High Performance MCS-51 Compliant Instruction Set

Estimate your chip with this semiconductor IP

Digital Blocks

IP Name

DB8051C-CP - Configurable 8051 MCU Peripherals

Provider

Digital Blocks

Description

8051 CPU IP - Small VLSI footprint, High Performance MCS-51 Compliant Instruction Set

Categories

IP Catalog : Digital Core IP : Processors : CISC

IP Catalog : Digital Core IP : Processors : RISC

IP Catalog : Digital Core IP : Processors : Macrosequencer

Portability

ASIC, FPGA, Structured

Process Node

32nm/TSMC

Type

Soft IP

Maturity

Please login or register to view this data

Overview

The Digital Blocks DB8051C-CP (Configurable Peripherals) Microcontroller Verilog IP Core is complaint with the MCS®51 Instruction Set and contains configurable peripherals, including an interrupt controller with up to 64+6 interrupt sources, timers, UART, I2C, SPI, CAN, PWM unit, Keyboard Controller, and I/O ports. The DB8051C-CP builds on the highly successful DB8051C CPU Core, utilizing Digital Blocks Instruction Overlap Architecture, which results in a small VLSI footprint and low Clocks Per Instruction high performance.

Features

8-bit Microcontroller Binary Compliant with MCS 51 Instruction Set

Standard 8051 Architecture: Arithmetic / Logical Unit, Hardware Multiply / Divide, Boolean Processor for Bit Manipulation, 5 Addressing Modes

Enhanced 8051 Architecture: minimum 3 Cycles Per Instruction Execution

Up to 256 bytes of internal Data Memory

Program Memory: User Defined, up to 64 KB (more with Memory Banking); NVM or Configurable SRAM

Data Memory: User Defined, up to 64 KB

User Selected Standard Peripherals: interrupt controller, UART Serial Port, two 16-bit timers, and four 8-bit I/O ports

User Selected Custom Peripherals: Additional 64 interrupts, I2C, SPI, CAN, PWM, Hardware Keyboard Controller

Streamlined ASIC & ASSP & FPGA Integration: Registered RAMs, Hardwired (No RAM) Micro Control Unit

Fully synthesizable, static synchronous design, single edge clocking, and no internal tri-states. Scan test ready

Deliverables

Verilog RTL Source

Comprehensive testbench suite with expected results

Synthesis scripts

Installation Guide

Technical Reference Manual

Market Category

Automotive, Communications, Consumer Electronics, Data Processing, Industrial and Medical, Military/Civil Aerospace

Datasheet

Please login or register to view this data

Gate Count

Please login or register to view this data

QIP Rating

This IP is not yet QIP rated.

Related IP from Digital Blocks you may be interested in...

	IP Name			Description
	DB8051C-SP - Standard 8051 MCU Peripherals			8051 CPU IP - Small VLSI footprint, High Performance MCS-51 Compliant Instruction Set
	DB9100AXI - BitBLT & 2D Graphics Engine			Hardware Accelerated Bit Block Transfer with 256 Raster Operations & 2D Graphics Rendering Engine (AXI Bus)
	DB8051C-FSM			Compact 8051 Microcontroller - complex Finite State Machine Applications
	DB1800			NTSC / PAL / SECAM Video Sync Separator IP Core
	DB1810 - Color Space Converter			RGB to YCrCb and YCrCb to RGB plus 8+ additional color space conversions supported