High-performance audio is an essential component to almost all consumer electronic devices. Digital home entertainment systems require support for multiple audio streams. Also, mobile multimedia devices, including smartphones, tablets, and digital cameras, have an increased need for higher audio quality. Integrating audio analog functionality into a system-on-chip (SoC) reduces overall system cost, area, and power as compared to a dedicated external audio integrated circuit (IC). With more than 15 years of delivering proven audio analog IP products, Synopsys offers a comprehensive portfolio of flexible, silicon proven, audio analog components that can be assembled to meet the performance, power, and area requirements of today's mobile multimedia and digital home SoCs. The DesignWare® Audio Analog Codec IP solution can be easily configured as a full codec, record channel only, or playback channel, depending on the application requirements. The DesignWare Audio Analog Codec IP libraries deliver basic, advanced or premium audio analog conversion features while reducing the overall silicon area of the audio analog codec. The DesignWare Audio Analog Codec IP is thoroughly tested in silicon, has shipped in over 100 million ICs, and supports a wide range of foundry process technologies from 180-nm to 28-nm, enabling designers to reduce integration risk and time-to-market.
The #1 provider of audio analog codec IP with over 40 audio IP products
Technology leadership with over 15 years of delivering proven audio analog codec IP products
Supports wide range of audio lineups addressing digital home entertainment and mobile multimedia applications
24-bit sigma-delta data converters
Low power consumption (less than 6 mW at 96 dB/48 kHz playback through a line driver)
100 dB performance demonstrated in silicon
Unique POP suppression techniques deliver superior audio quality
Flexible, silicon-proven audio analog components to support a wide range of customer requirements
Over 50 customers, over 75 tape-outs, over 100 M units shipped
Databook, Behavior Verilog Model
Abstract LEF and Timing Lib files
GDSII Layout Database
Assembly Guidelinesa and Full Integration Support
Consumer Electronics, Data Processing, Industrial and Medical, Military/Civil Aerospace, Others
"Developing the [USB] IP internally was never an option for us because it is not our core competency. Compared to other IP vendors we evaluated, Synopsys DesignWare USB 2.0 nanoPHY was 30% lower in area and up to 15% lower in power. It was one of the smallest PHYs we found. "