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Industry News
December, 2014
  • BeyondStudio IDE for NXP ZigBee IoT solutions provides breakthrough in programming experience
  • Thursday December 18, 2014 — ChipEstimate.com Partner Headline
  • Highlights: BeyondStudio revolutionizes the JN516x software development experience, matching or exceeding competing products in ease of use, productivity and code quality. Enables source level debugging through JTAG using Beyond Debug Key Achieves 15% code size reduction in JenNet-IP Mono bulb application. Better code quality for JN516x results in performance improvement of 19% in Dhrystone ...

  • Synopsys Surpasses Milestone of 100 VC Apps on the Verdi Debug Solution
  • Monday December 15, 2014 — Industry Headline
  • MOUNTAIN VIEW, Calif., Dec. 15, 2014 /PRNewswire/ -- Synopsys, Inc. (Nasdaq:SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced that the open Verdi® debug solution has achieved the milestone of more than 100 debug and analysis apps developed through the ...

  • VLSI Plus Announces Multiplexing CSI2 Transceiver IP core
  • Thursday December 11, 2014 — ChipEstimate.com Partner Headline
  • Raanana, Israel, December 11, 2014: VLSI Plus, a leading provider of MIPI CSI2 compliant IP cores, today announced the availability of the CSI2-MUX-A1-F a MIPI CSI2 transceiver, connecting to up to 4 CSI2 camera inputs, and outputting a multiplexed CSI2 stream with 4 data lanes, at up to 1.5Gbps ...

  • Coverity Scan Report Shows Big Data Projects Reducing Defects to Take on Internet of Things
  • Wednesday December 10, 2014 — Industry Headline
  • MOUNTAIN VIEW, Calif., Dec. 10, 2014 /PRNewswire/ -- Synopsys, Inc. (Nasdaq:SNPS), today announced its latest Coverity Scan® Project Spotlight report, which analyzed the defects in big data projects detected by the Coverity Scan open source software scanning service. In a sample of 16 big data projects that included Apache™ Hadoop®, ...

  • Synopsys' New LPDDR4 Verification IP Accelerates Verification Closure for HighPerformance Low Power Designs
  • Tuesday December 09, 2014 — ChipEstimate.com Partner Headline
  • Native SystemVerilog-based Memory VIP Portfolio Expanded to Support JEDEC LPDDR4 with Built-in Coverage, Verification Plan and Protocol-aware Debug MOUNTAIN VIEW, Calif., Dec. 9, 2014 - Synopsys, Inc., a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced the immediate availability of verification ...

  • Faraday Technology Corporation Selects Synopsys Virtualizer to Accelerate Software Development for SoC Designs
  • Thursday December 04, 2014 — ChipEstimate.com Partner Headline
  • Virtualizer Enables Faraday Design Services' Customers to Start Software Development up to 12 Months before Hardware Availability MOUNTAIN VIEW, Calif., Dec. 4, 2014 - Highlights: Synopsys Virtualizer enables Faraday to quickly create and deliver Virtualizer Development Kits (VDKs) to its customers VDKs are software development kits that use a virtual prototype as a ...

  • Brian Beattie Named EVP, Business Operations and Chief Administrative Officer
  • Wednesday December 03, 2014 — ChipEstimate.com Partner Headline
  • Trac Pham Appointed Chief Financial Officer MOUNTAIN VIEW, Calif., Dec. 3, 2014 - Synopsys, Inc., a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced that Brian Beattie has been promoted to executive vice president, business operations and chief administrative officer. ...

  • HiSilicon Expands Adoption of Cadence Tools and IP for AdvancedNode FinFET Designs
  • Monday December 01, 2014 — ChipEstimate.com Partner Headline
  • SAN JOSE, Calif., December 1, 2014 - Cadence Design Systems, Inc., a leader in global electronic design innovation, today announced that HiSilicon Technologies, a leading provider of communication network and digital media chipset solutions, has signed an agreement to significantly expand its use of the Cadence digital and custom/analog ...

Blogs

  • CDN LIVE Conference
  • Moore&npos; s Cycle, Fifth Horseman, Mixed Signals, and IP Stress
  • IP Insider Blog-By John Blyler
    Posted 3.23.2013
  • What do all of these things have in common? They were key topics addressed by Cadence...

ChipEstimate.TV

  • Mayor Chuck Reed
  • 10th Annual CEO Buisness Climate Summit, which brings together a select group of CEOs...