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Industry News
March, 2015
  • eSilicon Webinar Series: From Medical and Wearables to Big Data: Differentiated IP for the IoT Spectrum
  • Thursday March 26, 2015 — ChipEstimate.com Partner Headline
  • Customizing Memory IP for IoT Applications
    Presented in Japanese, Korean and Mandarin

    San Jose, Calif. – March 26, 2015 – Creating the right chip for power-sensitive Internet of Things (IoT) applications requires the right memory IP. These webinars will provide memory IP examples and customization techniques across IoT market segments that demonstrate ...

  • Hycon Technology Selects Andes N8 CPU Core for Next Generation High End 24-bit Analog-to-Digital Converter
  • Wednesday March 25, 2015 — ChipEstimate.com Partner Headline
  • Andes N8 High Performance, Low Power and Low Cost Helps Hycon 24-bit ADC’s Competitiveness in the Health Care Device Market

    March 25, 2015 - Andes Technology Corporation today announced that Hycon Technology Corporation, based in Taipei City Taiwan, selected the Andes high performance, low gate count, low power architecture  N8 32-bit processor core for ...

  • Cadence to Demonstrate 16FF+ and 10nm Design Solutions at TSMC Technology Symposium 2015
  • Tuesday March 24, 2015 — ChipEstimate.com Partner Headline
  • SAN JOSE, Calif., March 24, 2015 - Cadence Design Systems, Inc. today announced it is scheduled to demonstrate 16-nanometer (nm) FinFET Plus (16FF+) and 10nm advanced-node technologies that optimize customer designs and manufacturing efficiency at this year’s TSMC 2015 Technology Symposium at booth 103 on April 7, 2015, in San ...

  • Xilinx Highlights All Programmable Solutions for OTN, SDN, and Ethernet at OFC 2015
  • Thursday March 19, 2015 — Industry Headline
  • SAN JOSE, Calif., March 19, 2015 /PRNewswire/ -- Xilinx, Inc. (NASDAQ: XLNX) will highlight All Programmable solutions for OTN, SDN, and Ethernet in a wide array of technology demonstrations and presentations at OFC 2015. Throughout the show floor, Xilinx will showcase its industry-leading solutions enabling and interoperating with multiple wired communications ...

  • Cadence and ARM Announce Strategic IP Interoperability Agreement
  • Wednesday March 18, 2015 — ChipEstimate.com Partner Headline
  • Broad agreement to enable IP interoperability testing and system performance optimization to improve SoC performance and time to market

    SAN JOSE, Calif., March 18, 2015 -  Cadence Design Systems, Inc. and ARM today announced the signing of a broad Intellectual Property (IP) Interoperability Agreement. This multiyear agreement provides reciprocal ...

  • Baikal Electronics Selects Synopsys Solutions to Accelerate the Design and Verification of Their Advanced SoCs
  • Monday March 16, 2015 — ChipEstimate.com Partner Headline
  • Solutions Include DesignWare IP, Platform Architect, Galaxy Design Platform and Functional Verification

    MOUNTAIN VIEW, Calif., March 16, 2015 -  Synopsys, Inc. today announced that Baikal Electronics, a Russian semiconductor company, has selected Synopsys' broad portfolio of IP, system-on-chip (SoC) architecture design and analysis tools and its Galaxy™ Design Platform, as well ...

  • Synopsys' New Verification IP for MIPI SoundWire Enables Audio and Control Interfaces in Low Power Designs
  • Thursday March 12, 2015 — ChipEstimate.com Partner Headline
  • Native SystemVerilog-based VIP for SoundWire Expands Portfolio of VIP for Mobile Applications and Offers Built-in Coverage, Verification Plan and Protocol-aware Debug

    MOUNTAIN VIEW, Calif., March 12, 2015 -  Synopsys, Inc. announces the availability of verification IP (VIP) for the MIPI® Alliance SoundWireSM 1.0 specification. Synopsys VIP for MIPI SoundWire is based ...

  • SilabTech announces the release of its JESD204B Compliant 12.5Gbps SERDES PHY and Controller
  • Wednesday March 11, 2015 — ChipEstimate.com Partner Headline
  • Bengaluru, India - March 11, 2015 - SilabTech, leading supplier of High Speed Interface intellectual property designs (IPs), announced today the release of its JESD204B SERDES PHY and Controller. SilabTech has already delivered this JESD204B SERDES and Controller to its early licensees including a top tier semiconductor company. ...

  • Global Unichip Corporation Utilizes Cadence Analog IP to Implement WiGig-Enabled SoC on 28nm Process
  • Wednesday March 04, 2015 — ChipEstimate.com Partner Headline
  • GUC Achieved First Silicon Success with Industry's First Analog Front-End IP

    SAN JOSE, Calif., March 4, 2015 - Cadence Design Systems, Inc. today announced that Global Unichip Corporation (GUC) achieved first-silicon success integrating tri-band analog front-end (AFE) intellectual property (IP) with WiGig (IEEE 802.11ad), enabling integration of digital logic and analog ...

  • NXP’s MIFARE DESFire Drives Smart Mobility in Barcelona
  • Tuesday March 03, 2015 — ChipEstimate.com Partner Headline
  • Full interoperability and additional service possibilities offered with new T-Mobilitat card

    Eindhoven, Netherlands, March 04, 2015 – NXP Semiconductors N.V. today announced that the Barcelona Metropolitan Transport Authority (ATM) will use MIFARE® DESFire® for their new mobility card, T-Mobilitat. Barcelona’s long-term ambition to become a self-sufficient and innovative city through progressive ...

  • DTS Headphone:X Optimized for Cadence Tensilica HiFi Audio DSPs
  • Monday March 02, 2015 — ChipEstimate.com Partner Headline
  • New audio solution enables incredibly realistic multi-channel surround sound on any device, over any set of headphones

    SAN JOSE, Calif., March 2, 2015 - Cadence Design Systems, Inc., today announced that DTS, Inc.'s Headphone:X immersive sound technology has been optimized for the Cadence Tensilica HiFi Audio/Voice digital signal processor (DSP) ...


  • CDN LIVE Conference
  • Moore&npos; s Cycle, Fifth Horseman, Mixed Signals, and IP Stress
  • IP Insider Blog-By John Blyler
    Posted 3.23.2013
  • What do all of these things have in common? They were key topics addressed by Cadence...


  • Mayor Chuck Reed
  • 10th Annual CEO Buisness Climate Summit, which brings together a select group of CEOs...