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Industry News
October, 2014
  • AEG Power Solutions to Exhibit at ADIPEC, Abu Dhabi
  • Thursday October 30, 2014 — Industry Headline
  • WARSTEIN-BELECKE, Germany--(BUSINESS WIRE)--AEG Power Solutions (FWB:3W9K), a global provider of power electronic systems and solutions for industrial power supplies and renewable energy applications, will be exhibiting at ADIPEC in Abu Dhabi, UAE. At ...

  • ARM Launches Embedded Systems Education Kit to Make Students Workready
  • Wednesday October 29, 2014 — Industry Headline
  • CAMBRIDGE, U.K.--(BUSINESS WIRE)--ARM today unveiled a low-cost toolkit for universities enabling educators to teach industry-standard embedded systems design and programming concepts. The ARM® Embedded Education Kit gives students access to the latest ...

  • TSMC, Kilopass Deliver NVM OTP IP for the 16FinFET Process Node
  • Tuesday October 28, 2014 — ChipEstimate.com Partner Headline
  • Companies Extend Collaboration to Enable Joint Customers To Deliver Next-Generation Designs SANTA CLARA, CALIF., October 28, 2014 - Kilopass Technology Inc., a leading provider of semiconductor logic embedded non-volatile memory (eNVM) intellectual property (IP), announced today that it has successfully ported its one-time programmable (OTP) NVM technology to TSMCs 16 nanometer ...

  • Synopsys and Gowin Semiconductor Ink MultiYear OEM Agreement for FPGA Design Software
  • Monday October 27, 2014 — ChipEstimate.com Partner Headline
  • Synopsys Synplify Pro Synthesis Tool Delivers Superior Quality of Results for Users of Gowin Semiconductor FPGAs MOUNTAIN VIEW, Calif., Oct. 27, 2014 - Highlights: Multi-year agreement provides Gowin FPGA users with Synopsys' Synplify Pro high-quality FPGA synthesis tool to produce high-performance, cost-effective FPGA designs Synplify Pro is optimized for Gowin ...

  • Cadence Announces Broad Portfolio of 3D Memory Verification IP
  • Thursday October 23, 2014 — ChipEstimate.com Partner Headline
  • Support for Early Adoption of Wide I/O 2, HMC, HBM and DDR4-3DS Standards SAN JOSE, Calif., October 23, 2014 - Cadence Design Systems, Inc., a leader in global electronic design innovation, today announced the immediate availability of verification IP (VIP) supporting all popular 3D memory standards including Wide I/O 2, ...

  • Secure Connections for a Smarter World CARTES 2014
  • Sunday October 19, 2014 — Industry Headline
  • Visit us at CARTES in Paris, France, November 4-6, booth #4M070. With over 20,000 visitors from over 140 countries, the CARTES Secure Connexions Event 2014 is one of the largest global events dedicated entirely to secure solutions for payment, identification and mobility. The central theme of this year’s CARTES is ...

  • Sibridge Technologies announces Wireless Sensor Network Reference Design
  • Friday October 17, 2014 — ChipEstimate.com Partner Headline
  • Ultra-low-power design targeted for IoT applications Wireless configured with Over-the-Air programming Cloud Based Servers for Cloud computing Santa Clara, CA - 17th October, 2014 - Sibridge Technologies, a leading provider of Design and Verification IPs, with expertise in ASIC/SoC Design, Verification and Embedded solutions, today announced an ultra-low-power smart Wireless Sensor Network Reference ...

  • Cadence to Showcase Automotive Application Solutions at SAE 2014 Convergence Conference and Exhibition
  • Thursday October 16, 2014 — ChipEstimate.com Partner Headline
  • SAN JOSE, Calif., October 16, 2014 -Cadence Design Systems, Inc., a leader in global electronic design innovation, today announced it plans to showcase its intellectual property (IP) and system design and verification tools for designing systems on chip (SoCs) for automotive applications at the SAE 2014 Convergence Conference and Exhibition. ...

  • Cadence Announces Industry's First MultiProtocol DDR4 and LPDDR4 IP Solution
  • Wednesday October 15, 2014 — ChipEstimate.com Partner Headline
  • Highlights: Multi-protocol DDR4/LPDDR4 controller and PHY IP solution enables designers to make performance and system cost tradeoffs while reducing risk and shortening design cycles Combined high-performance and low-power multi-protocol DDR IP provides flexibility to address emerging memory and system cost requirements in consumer, mobile and enterprise applications Extends memory leadership from LPDDR3/DDR4/3 to ...

  • New DesignWare ARC HS38 Processor Doubles Performance for Embedded Linux Applications
  • Tuesday October 14, 2014 — ChipEstimate.com Partner Headline
  • Successor to Popular ARC 770D Core Delivers Significant Performance Increase, Support for 40-bit Physical Addresses and L2 Cache MOUNTAIN VIEW, Calif., Oct. 14, 2014 - Highlights: New 32-bit ARC HS38 processor core is based on the extensible ARCv2 architecture and is optimized for growing number of embedded applications running Linux Delivers more than ...

  • Cadence Offers Industry's First MIPI SoundWire Controller IP Solution
  • Thursday October 09, 2014 — ChipEstimate.com Partner Headline
  • Highlights: New highly efficient audio interface, targeted for mobile applications, cuts area and cost by up to 50 percent Feature-rich, compact IP solution interfaces directly with digital microphones and speakers in next-generation mobile systems Verification IP available now to facilitate early adoption of the new SoundWire spec SAN JOSE, Calif., October 9, 2014 ...

  • Cadence to Keynote and Sponsor MemCon 2014
  • Wednesday October 08, 2014 — ChipEstimate.com Partner Headline
  • SAN JOSE, Calif. October 8, 2014 - Cadence Design Systems, Inc., a leader in global electronic design innovation, today announced its sponsorship of MemCon, the premier conference on memory technology and innovation. MemCon was founded by Denali Systems, a leading provider of memory models and technology, which Cadence acquired in ...

  • Synopsys Releases Verification IP for Mobile PCIe Technology
  • Tuesday October 07, 2014 — ChipEstimate.com Partner Headline
  • Native SystemVerilog-based VIP for PCI Express architecture now supports M-PCIe technology, with built-in coverage, verification plan and protocol-aware debug MOUNTAIN VIEW, Calif., Oct. 7, 2014 -Synopsys, Inc., a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced the availability of verification IP ...

  • Enverv chooses Dolphin Integration's Library for their Smart metering applications
  • Monday October 06, 2014 — ChipEstimate.com Partner Headline
  • Milpitas, California and Grenoble, France. October 6, 2014 - Enverv and Dolphin Integration are proud to announce their partnership for the optimization of Enverv's Smart metering applications, thanks to the low leakage of Dolphin Integration's standard cell library. Relying on 30 years of experience, the standard cell library SESAME BIV ...

  • Alliance drives adoption of solidstate RF energy
  • Sunday October 05, 2014 — Industry Headline
  • NXP and five major partners (E.G.O. Elektro-Gerätebau GmbH, Huber+Suhner, ITW, Rogers Corporation and Whirlpool Corporation) have formed the RF Energy Alliance to spearhead the ecosystem for emerging RF Energy applications. Together, the companies cover the entire value chain from component to a commercial application of solid state cooking and share ...

  • Cadence to Showcase Advanced Verification Solutions at DVCon Europe 2014
  • Thursday October 02, 2014 — ChipEstimate.com Partner Headline
  • FELDKIRCHEN, Germany, Oct. 2, 2014 - Cadence Design Systems, Inc., a leader in global design innovation, today announced it plans to exhibit its advanced verification technologies and methodologies at the first Design and Verification Conference (DVCon) Europe in Munich, Germany. The conference is focused on the application of Electronic ...

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