December 4, 2007
	Effective ESD Strategies in nano-CMOS IC design   By Katty Van Mele, Sarnoff Europe The hunger for shorter design cycles and rapid product innovation needs to be fed by a.o. silicon and product proven re-usable IP. To address such important business need, Sarnoff Europe introduced so-called TakeCharge Design Kits, offering proven solutions with design and integration tools for on-chip ESD protection, which is another non-core but necessary technology for nano-CMOS ICs. The response from foundry and fabless companies worldwide reflects the importance of integrated ESD design in the overall IC design process. more >> Visit your CPU Superstore: C166, ColdFire, Power Architecture, CompactRisc more >>		Low Cost, Low Power, Standard 32-bit Processor Cores more >> Slave DLL is part of a Delay Lock Loop system, which is designed to... from Rapid Bridge Master DLL from Rapid Bridge Gigabit Ethernet 802.3 Media Access Controller (MAC) from Arasan Chip Systems 10/100/1000 Ethernet 802.3 Media Access Controller (MAC) from Arasan Chip Systems AEON/MTP EEPROM NVM in 0.13 um process for HDMI from Impinj AEON/MTP EEPROM for Power Management / HV applications from Impinj Capless Voltage Regulator; 1.5V Output, 2.5V Input; up to 400mA;... from Chipidea Low Drop-Out (LDO) Voltage Regulator; 2.5V Output; 5.5V to... from Chipidea SMIC 0.18um 1.8V 10 Bit 100Mhz ADC from VeriSilicon SMIC 0.18um 8 bit, low power, analog to digital converter from VeriSilicon Full chip, configurable ESD protection design kit with GDSII,... from Sarnoff Europe Full chip, configurable ESD protection design kit with GDSII,... from Sarnoff Europe SNOW 3G Cipher Core from Elliptic Four Channel LVDS Receiver/Deserializer IP - Designed for... from Mixel Spread-Spectrum PLL from Mixel MobileDDR / Mobile SDR Memory Controller IP from Denali Software Verification IP for PCI Express I/II from Denali Software		Global IP Consumption   Quarterly semiconductor IP consumption data reveals a growing expansion of IP reuse in Asia, for the first time surmounting that of all other geographies. The SoC platform IP provider   30% Better H.264 HW IP   Mixed Signal IP - 90nm & 65nm
	MIPI CSI - Camera Serial Interface Receiver Controller from Arasan Chip Systems Wide Range Deskew PLL for Chartered 0.13u-Nominal from Analog Bits DDR SDRAM Controller from Altera H.264 Video Decoder (AVC/MPEG-4 Part 10) from Conexant Full chip, configurable ESD protection design kit with GDSII,... from Sarnoff Europe DesignWare DDR2/DDR3-Lite Memory Controller implements a... from Synopsys 4.25 Gigabit Quad Transceiver/SerDes IP - Designed for TSMC... from Mixel
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	FSA seeks to take on larger industry role: transitions to Global... To emphasize its global role in creating an ecosystem and expansion of industry leadership, the San Jose-based industry association is transitioning to become the... SIA: Chip sales up modestly in October As consumers reap the benefits from continued rapid price attrition in key sectors of the semiconductor market heading into the holiday buying season, the... Cadence makes logic verification OVM-savvy Cadence Design Systems has added several enhancements, including support for the OVM (open-verification methodology)?to its Incisive logic-verification-tool lineup. Sidense OTP Integrated in XMOS Programmable Semiconductor Sidense, a leading developer of Logic Non-Volatile Memory (NVM) IP cores, today announced that its one-time programmable (OTP) technology... Mentor Q3 earnings slip As expected, Wilsonville, Ore.-based semiconductor design software supplier Mentor Graphics Corp. announced revenue and earnings per share for its fiscal Q3 fell below... Dells sorrows continue in Q3 PC market Dells pain has become its competitors gains. According to a preliminary worldwide PC market report from iSuppli, Dell underperformed the market in Q3 with meager... Micron marks entry into solid state drive market with 3 form factors In a bid to capture more of the still rapidly growing NAND flash memory market, the Boise, Idaho-based DRAM giant unveiled its first solid-state drive products aimed at... AMD expands India R&D for Shanghai chip work AMDs engineering staffs in Bangalore, who will move into a new 52,000-square-foot center, are set to focus on "Shanghai," AMD's first 45-nm quad-core MPU. iSuppli: 2007 winners and losers separated by competitiveness 2007 has proved to be a good year for those companies with the competitive instinct, according to a report from iSuppli, giving the firms preliminary global semiconductor... Avnet expands agreement with Tyco, adds HP UNIX support to consulting... Phoenix-based electronics supply chain giant Avnet this week expanded two of its agreements through its operating groups, Avnet Electronics Marketing and Avnet...
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