February 12, 2008   
Solving the Integration Challenges of USB-Enabled Designs
 
By Gervais Fong
Sr. Product Manager
DesignWare PHY IP
Synopsys
Todays IP choices for the Universal Serial Bus (USB) cover many different types of interfaces for a wide variety of applicationsincluding portable consumer products. Power consumption and small form factors are key issues. SoC designers must also consider new requirements imposed by smaller technology nodes, especially for the USB PHY. This article provides insights into dealing with these issues and profiles the USB IP choices available from Synopsys. more >>
Want the most reliable NVM for your next SOC? Visit Sidense's IP Catalog. more >>
Freescale V1 ColdFire $10K
Famous IP - Available Online
more >>
ESD protection cells for SerDes applications - 90nm UMC
from Sarnoff Europe
ESD protection cells for SerDes applications - 65nm UMC
from Sarnoff Europe
NAND Flash File System - software solution for embedded systems...
from Arasan Chip Systems
SD / SDIO 2.0 Host Controller - Fully compliant SD / SDIO...
from Arasan Chip Systems
Smart Card Interface Device supporting ISO 7816-3
from IPextreme
128 Kbit NVM in 90nm Standard Logic CMOS process OTP/eMTP
from Sidense
16 Kbit NVM in 90nm Standard Logic CMOS process OTP/eMTP
from Sidense
AEON/MTP Parallel 80 bits w/ integrated HV from Impinj
AEON/MTP Parallel 80 bits w/ external HV from Impinj
CAN serial bus interface for low/high speed applications which...
from IPextreme
AXI-PCI Express Bridge from PLDA
PCIe 2.0 Controller for ASIC
from PLDA
Parallel IDE Device Ultra ATA-133 w/o DMA from Mentor
Serial ATA Device I/II (1.5-3.0Gbps) from ASICS World Services
32-bit SPARC V8 processor
from Gaisler Research
NoC IP Library provides all the components for building an...
from Arteris
Random number generator (RNG), full featured, standards...
from Certicom
IP Reuse Challenges

 
In this study of the most challenging aspects of IP reuse, respondents clearly point to business model issues as the predominant challenge followed closely by IP integration and quality. Fortunately, work of industry associations such as the Global Semiconductor Alliance and leading IP providers are making good strides in improving all aspects of IP reuse.
PCIe ASIC IP Cores
 
Differentiated Analog IP
 
Make Your SoC Successful


 
Multi-codec hardware IP - H264, MPEG4 and H263 codec - For...
from Thin Multimedia
ARMCortex-M3 processor core w/o cache from ARM
Camera Interface supporting up to 12.6 Megapixel with internal...
from Silicon Image
512 Kbit NVM in 90nm Standard Logic CMOS process OTP/eMTP
from Sidense
PHY for 10G Ethernet over the Backplane, XFI and Related...
from ARM
NAND Flash Controller - complaint to ONFI Spec. Ver.1.ORC
from Arasan Chip Systems
Data Encryption Standard Core
from CAST
 
Our PLLs and DDR DLLs are high-quality, low-jitter, silicon-proven hard macros. Immediate delivery in TSMC, UMC, CHRT and Common Platform processes from 180nm to 55nm. Visit the timing experts at www.TrueCircuits.com
 
Arrow acquires defense, aerospace component distributor
To compliment its military discrete components business, Arrow Electronics Inc will acquire defense and aerospace-focused independent electronic component distributor...
Semi, PCB shipments hurt by energy prices, mortgage woes, IPC reports
In its monthly report for December, the IPC finds that US consumer spending declined dramatically.
Synfora debuts C-to-RTL algorithm-synthesis tool
PICO Extreme focuses on synthesizing algorithm-intensive blocks in SOCs.
China not immune to handset shipment slowdown
Mobile handset shipments from manufacturers headquartered in China grew dramatically in 2007 at 76.2%, but that stellar growth wont carry over into 2008,...
US government increasing commitment to semiconductor research
Reversing the trend of decreasing semiconductor research funding, the US Department of Defense has released its 2009 budget for the Defense Advanced Research Projects...
Staying above the fray
Wall Street wakes up and takes note of Avnet, one of a few tech companies that reported stellar results for the December quarter, as the economic slowdown impacts...
Intel charged with patent infringement in Core 2 Duo by Wisconsin tech...
Technology transfer office Wisconsin Alumni Research Foundation has filed a patent infringement lawsuit against Intel Corp for alleged patent infringement of a University...
IC verification key: 'Do it step by step, don't cut corners'
The EDA industry hasn?t come up with a silver bullet to reduce the amount of functional verification IC engineers need to perform to get chips out the door in a timely...
Freescale CEO Michel Mayer resigns
Outgoing chairman and CEO Michel Mayer will continue in his current role at the embedded semiconductors company until a successor has been identified.
Arrow reports record sales
Q4 sales of $4.42 billion were accompanied by net income of $114 million, compared with net income of $128.1 million in the year-ago quarter, and contributed strongly to...
The MoSys IP solution set spans dense embedded memory and analog/mixed signal IP technology, silicon proven across popular foundries & geometries. With > 97 patents, the MoSys 1T-SRAM memory is 3X denser than 6T-SRAM at 3-times less power consumption. Its analog/mixed-signal IP includes silicon proven blocks for Gb Ethernet PHY, Serial ATA, and BD/HD/CH DVD IP. more >>
UPDATE PROFILE  |  FEEDBACK  |  PASS IT ON  |  REGISTER  |  TERMS OF USE  |  NEWSLETTER ARCHIVE
Copyright © 2008 ChipEstimate.com. All rights reserved.