IP Talks at DAC 2010
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IP Connections Newsletter

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Tech Talk is a column in each issue of IP Connections which provides readers with valuable technical insight into how IP can help achieve design goals while speeding time to market. If you are interested in submitting a Tech Talk article for publication, please contact us.

All Years | 2010 | 2009 | 2008 | 2007 
 
Date IP Connections Tech Talk
 
Aug 24, 2010 [Read Newsletter] Announcing the Cadence SOI Design Hub
- By Susan Runowicz-Smith, Cadence
Aug 10, 2010 [Read Newsletter] Is there a “one-size fits all” SOC PLL?
- By Jeff Galloway, Silicon Creations
Jul 27, 2010 [Read Newsletter] Designing for System-On-Chip
- By Mark Dunn, Imagination Technologies
Jul 13, 2010 [Read Newsletter] A New Way to Store Program Code—With Gusto
- By Albert Chen, Kilopass Technology
Jun 29, 2010 [Read Newsletter] Plug-and-Play IP using AXI4 Standard Interconnect
- By Ron DiGiuseppe, Xilinx
Jun 15, 2010 [Read Newsletter] Dispelling the Myths Surrounding Antifuse OTP
- By Jim Lipman, Sidense
Jun 01, 2010 [Read Newsletter] Integration-Optimized SuperSpeed USB3.0 IP from Cadence
- By Ranga Srinivasan, Cadence
May 18, 2010 [Read Newsletter] Choosing the right Analog-Front-End Solution for Wireless MIMO
- By Krishnan Ramabadran & Sundararajan Krishnan, Cosmic Circuits
May 04, 2010 [Read Newsletter] An End-to-end Yield Optimization Solution
- By Dr. Yervant Zorian, Virage Logic
Apr 20, 2010 [Read Newsletter] DesignWare DDR3/2 PHY
- By John Ellis, Synopsys
Apr 06, 2010 [Read Newsletter] The Time is Right for SOI Technology Adoption
- By Susan Runowicz-Smith, Cadence
Mar 23, 2010 [Read Newsletter] Unzipping the GZIP compression protocol
- By Joe Rash, CebaTech
Mar 09, 2010 [Read Newsletter] High-Speed Serial Memory Interfaces
- By Michael Miller, MoSys
Feb 23, 2010 [Read Newsletter] Choosing the best Standard Cell Library without falling into the traps of traditional benchmarking methods
- By Andrea Bonzo, Dolphin Integration
Feb 09, 2010 [Read Newsletter] The next IC design methodology transition is long overdue
- By Michael Meredith and Steve Svoboda
Jan 26, 2010 [Read Newsletter] Enabling Technology Adoption through Total IP Solutions from Arasan Chip Systems
- By Somnath Viswanath, Arasan Chip Systems
Jan 12, 2010 [Read Newsletter] Chip planning paves way to IC success
- By Richard Goering, Cadence
Dec 29, 2009 [Read Newsletter] Performance of high resolution analog functions embedded into a SoC guaranteed by the Three-Noise-Path method
- By Florian Espalieu, Dolphin Integration
Dec 15, 2009 [Read Newsletter] Advanced Audio Drivers - the rising of a new class of drivers
- By João Risques, Synopsys
Dec 01, 2009 [Read Newsletter] Can MIPI and MDDI Co-Exist?
- By Ashraf Takla, Mixel
Nov 17, 2009 [Read Newsletter] Analog & Mixed Signal IC Debug: A high precision ADC application
- By Frederic Poullet, Dolphin Integration
Nov 03, 2009 [Read Newsletter] NeoFlash®- True Logic Single Poly Embedded Flash Memory Technology
- By Wein-Town Sun, eMemory
Oct 20, 2009 [Read Newsletter] Reap the Benefits without the Cost: Mobile Handset Chips Utilize Antifuse NVM from Configuration to Code Storage
- By Linh Hong, Kilopass Technology
Oct 06, 2009 [Read Newsletter] Delivering High Quality PCI Express 3.0 IP on schedule with Metric Driven Verification
- By Moshik Rubin, Cadence
Sep 22, 2009 [Read Newsletter] Choosing the right architecture for Analog-to-Digital Conversion in Wireless Broadband Communications AFEs
- By Manuel Mota, Synopsys
Sep 08, 2009 [Read Newsletter] 4G Designs Call For Programmability
- By Eyal Bergman, CEVA
Aug 25, 2009 [Read Newsletter] Message from DAC: IP modeling is the key to ESL
- By Richard Goering, Cadence
Aug 11, 2009 [Read Newsletter] Build SOC functional blocks 98.6% faster than you do today
- By Graham Wilson, Tensilica
Jul 28, 2009 [Read Newsletter] IP Has A Shining Future
- By Gabe Moretti
Jul 14, 2009 [Read Newsletter] Versatile OTP Can Replace Several Memories
- By Jim Lipman, Sidense
Jun 30, 2009 [Read Newsletter] Auto Industry Replaces Fuse Technology with Standard CMOS Based MTP; Adds Functionality, Testability and Reliability
- By Craig Zajac, Virage Logic
Jun 16, 2009 [Read Newsletter] Metric Driven Verification Key to Delivering High Quality SuperSpeed USB (3.0) IP
- By Pete Heller, Cadence
Jun 02, 2009 [Read Newsletter] TLM-2.0 in Action - Welcome to the New World of Model Interoperability
- By Mike Meredith
May 19, 2009 [Read Newsletter] DDR2/3 SDRAM Controller Options: Protocol or Memory Controller
- By David Ptak, Synopsys
May 05, 2009 [Read Newsletter] SafeNet's Growing Popularity of Packet Engines and Secure Platforms
- By Guy Huylebroeck, AuthenTec
Apr 21, 2009 [Read Newsletter] Phase-Locked Loops Demystified
- By Eskinder Hailu and John G. Maneatis , True Circuits
Apr 07, 2009 [Read Newsletter] InCyte data shows path to lower process nodes
- By Richard Goering, Cadence
Mar 24, 2009 [Read Newsletter] Adding Physical Test and Debug Access to Chips with a Compact JTAG Core
- By Pierre-Xavier Thomas, IPextreme
Mar 10, 2009 [Read Newsletter] How Much Power Will a Low-Power SDRAM Save You?
- By Marc Greenberg, Denali Software
Feb 24, 2009 [Read Newsletter] Pipeline vs. Sigma Delta ADC for Communications Applications
- By Noel O'Riordan, S3 Group
Feb 10, 2009 [Read Newsletter] IP Selection Implications on Package Design
- By Javier DeLaCruz, eSilicon
Jan 27, 2009 [Read Newsletter] SONOS embedded flash applications at 0.13µm and beyond
- By Bo Jin, Cypress Semiconductor
Jan 13, 2009 [Read Newsletter] Coreworks Reconfigurable Engine Technology Enables Faster Design of Application Specific Processors
- By Nuno Lourenco, Coreworks
Dec 30, 2008 [Read Newsletter] Statistical Static Timing Analysis - A Better Alternative
- By Rakesh Chadha, eSilicon
Dec 16, 2008 [Read Newsletter] High Resolution Display Architecture for Next Generation Mobile Internet Devices
- By David DeMaria, MoSys
Dec 02, 2008 [Read Newsletter] ECC Drives Next Generation Hardware Security Applications
- By Daniel O'Loughlin, Certicom
Nov 18, 2008 [Read Newsletter] Meeting the Need for SuperSpeed USB
- By Gervais Fong, Synopsys
Nov 04, 2008 [Read Newsletter] Successful Third-Party IP Integration: Science or Art?
- By Hans Bouwmeester
Oct 21, 2008 [Read Newsletter] Cypress SONOS - A Scalable Embedded Flash Technology
- By Krishnaswamy Ramkumar, Cypress Semiconductor
Oct 07, 2008 [Read Newsletter] Reducing Power in High Performance Designs
- By Dan Hillman
Sep 23, 2008 [Read Newsletter] Profitable SoC Design: Using Logic NVM to Reduce SOC Costs
- By Pearl Cheng, Kilopass Technology
Sep 09, 2008 [Read Newsletter] Industry Dialogue Overdue on Third-Party IP Issues
- By Walter Ng, Chartered
Aug 26, 2008 [Read Newsletter] The Impact of the Changing Semiconductor Landscape on Third-Party IP Suppliers
- By Walter Ng, Chartered
Aug 12, 2008 [Read Newsletter] Cadence Compliance Management System and Metric Drive Verification Enables ClearSpeed to Reach Coverage Goals Faster
- By Mike Bartley
Jul 29, 2008 [Read Newsletter] How Innovations in DRAM Memory Architecture Promise to Raise Memory Throughput to 51.2GB/s
- By Michael Ching, Rambus
Jul 15, 2008 [Read Newsletter] Choosing IP - It's not just the product, it's the relationship
- By Stéphane Hauradou, PLDA
Jul 01, 2008 [Read Newsletter] PFI Low-Power Design Guide Details Methodology and Design Examples Using the Common Power Format
- By Susan Runowicz-Smith, Cadence
Jun 17, 2008 [Read Newsletter] Designing Low-Power Field-Programmable OTP Memory Arrays
- By Jim Lipman, Sidense
Jun 03, 2008 [Read Newsletter] Keeping the best audio quality in mobile phone by managing voltage drops created by 217 Hz transients
- By Marie Maurel, Dolphin Integration
May 20, 2008 [Read Newsletter] FREE BEER with every IP!!!
- By Kevin K. Yee, Arasan Chip Systems
May 06, 2008 [Read Newsletter] Every System Chip Needs OTP for One of These Applications!
- By Craig Rawlings, Kilopass Technology
Apr 22, 2008 [Read Newsletter] IP Design Methodology: Its Time has Arrived
- By Warren Savage, IPextreme
Apr 08, 2008 [Read Newsletter] Gain Freedom Through a Value Chain Producer
- By Kalar Rajendiran, eSilicon
Mar 25, 2008 [Read Newsletter] The Next Generation of DFM Tools: Die-Level Parametric Variation Monitoring
- By Ken Harris, Ridgetop Group
Mar 11, 2008 [Read Newsletter] Why Replacing ROM with 1T-OTP Makes Sense
- By Jim Lipman, Sidense
Feb 26, 2008 [Read Newsletter] Lowering Overall Chip Costs
- By ARM, Chartered, HP, Virage Logic
Feb 12, 2008 [Read Newsletter] Solving the Integration Challenges of USB-Enabled Designs
- By Gervais Fong, Synopsys
Jan 29, 2008 [Read Newsletter] Hardware Security Requirements for Embedded Encryption Key Storage
- By Craig Rawlings, Kilopass Technology
Jan 15, 2008 [Read Newsletter] How to Add No-Sweat, Low-Power Audio to Your Next SOC Design
- By Steve Leibson, Tensilica
Jan 03, 2008 [Read Newsletter] Don't Get Critical IP from a 'Supermarket'
- By Stephane Hauradou, PLDA
Dec 18, 2007 [Read Newsletter] 1T OTP Memory: Delivering Quality and Reliability
- By Wlodek Kurjanowicz, Sidense
Dec 04, 2007 [Read Newsletter] EFFECTIVE ESD STRATEGIES IN NANO-CMOS IC DESIGN
- By Katty Van Mele, SOFICS - Solutions for ICs
Nov 20, 2007 [Read Newsletter] The Evolution of Security IP
- By Richard White, Elliptic
Nov 06, 2007 [Read Newsletter] Solutions Chipidea: A Complete Spectrum of RF and Wireless Connectivity
- By Dr. Carlos Azeredo Leme, MIPS Technologies - Analog Business Group
Oct 23, 2007 [Read Newsletter] Common Platform Technology Alliance Provides New Model for IC Manufacturing
- By Walter Ng, Chartered
Oct 09, 2007 [Read Newsletter] Real-Time Detection of Solder Joint Faults in Operating FPGAs
- By Ken Harris, Ridgetop Group
Sep 25, 2007 [Read Newsletter] Hardware Based Digital Content Protection
- By Charles Ng, Kilopass Technology
Sep 11, 2007 [Read Newsletter] IPecosystem™: Assessing Risks and Hidden Costs
- By Lisa Tafoya
Aug 28, 2007 [Read Newsletter] Phase-Locked Loops (PLLs) Demystified
- By John G. Maneatis, Ph.D. and Eskinder Hailu, Ph.D., True Circuits
Aug 14, 2007 [Read Newsletter] Integrated Subsystem IP: Addressing the Challenges of SoC Convergence
- By Cary Snyder, Mentor
Jul 31, 2007 [Read Newsletter] Things to know ... about security in silicon
- By Dr. Bill Anderson, AuthenTec
Jul 17, 2007 [Read Newsletter] Making your UWB solutions "Future Proof"
- By Aditya Agarwal and Sukalyan Mukherjee, Wipro-NewLogic
Jul 03, 2007 [Read Newsletter] An ESL-Based Design flow for Hardware Acceleration of the GZIP Compression Algorithm
- By Chad Spackman, CebaTech
Jun 19, 2007 [Read Newsletter] IP Talks! ...and 100s Listen at DAC 2007
- By Two dozen IP industry leaders
Jun 05, 2007 [Read Newsletter] Secure, One-Time Programmable Memory for DCP Encryption Key Storage Applications
- By Wlodek Kurjanowicz, Sidense
May 22, 2007 [Read Newsletter] Standard Chip Estimation Methodology
- By Udupi Harisharan
May 08, 2007 [Read Newsletter] Platform SOC Architectures Require Embedded Non-Volatile Memory
- By Craig Rawlings, Kilopass Technology
Apr 24, 2007 [Read Newsletter] Analyzing Die Size, Power and Cost Tradeoffs Between Different Cell Libraries for Mobile Applications
- By Wolfgang Helfricht, ARM

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