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In the News

TSMC Certifies Cadence Tempus Timing Signoff Solution for 20nm Designs
05/23/2013

Cadence Celebrates 25 Years as a Leader in the EDA Industry at 50th DAC
05/23/2013

FishTail Design Automation Joins Cadence Connections Program
05/08/2013

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Testimonials

"Cadence® USB 3.0 verification IP has enabled us to thoroughly verify that our designs comply with the USB 3.0 specification, and this new SSIC product demonstrates the company’s commitment to supporting engineers working with this key protocol. By supporting all popular verification methodologies and simulators, the Cadence VIP has enabled GUC to support our diverse customer base with high-quality SoC and IP verification coverage."
James Cheng, Global Unichip

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Tech Talks

The Coming Impact of Mobile PCI Express (M-PCIe) on SoCs and Devices
(04/30/2013)

Why USB 3.0 Will Drive SoC Verification in 2013
(01/15/2013)

Smashing Through the Mobile Device Memory Bottleneck
(12/11/2012)

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White Papers

Cadence SoC Realization
(07/21/2011)

Verifying the LIN automotive network
(12/08/2009)

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Cadence IP Portal

Today's SoC designs require a new definition of IP, one that extends beyond traditional IP to address integration complexity, verification and software to significantly reduce the cost of SoC design. In this definition of IP, Cadence delivers a fully integrated IP stack that extends from the physical interface though the controller to the bare-metal software, and includes a comprehensive design and verification environment.

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Contact Cadence

Do you have questions on the Cadence IP offerings listed here? Our IP Concierge service can contact Cadence and other IP vendors on your behalf and they will reply to you directly. You may also send a message to Cadence regarding their IP by clicking here.