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Sidense's 1T-Fuse(TM) Logic NVM IP is based on a patented, one-time programmable (OTP) technology that provides the most cost-effective and reliable OTP solution in the industry. No additional mask layers or process steps are required and the IP is portable across many different technology nodes, process variants and foundries. The OTP can be programmed in the field, at wafer probe, or during production testing. Sidense memory products are targeted to standard-logic digital CMOS processes that are 180nm to 20nm and below and are available for all Top-Tier foundries and selected IDMs.

Additional features include field-programmable OTP and emulated multi-time programmable (eMTP) modes; a very small footprint using one transistor per bit; programming voltages supplied on-chip; very fast read-access times, greater than 10-year retention at 125°C and a 100% read cycle; conversion to mask ROM with a single diffusion mask and no process changes; JTAG and BIST support; extremely secure and almost impossible to reverse engineer (no charge storage); very reliable at high temperatures; and seamless integration to ASIC and COT.

Jim Hogan, Vista Ventures. SystemC Day, DVCon 2011. ChipEstimate.TV

Jim Hogan, Vista Ventures. SystemC Day, DVCon 2011. ChipEstimate.TV. --Verification (VIP), SoC IP



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