MIPI CSI VIP - MIPI CSI Verification IP - Comprehensive Test Environment for verification, validation, debugging and test.
MIPI DSI VIP - MIPI DSI Verification IP - Comprehensive Test Environment for verification, validation, debugging and test.
MIPI SLIMbus Verification IP - Comprehensive Test Environment for verification, validation, debugging and test.
MIPI SLIMBus Analyzer - Debug and analyze SLIMBus protocol compliance using this protocol analyzer
SD / SDIO VIP - Host/Device Verification IP - Comprehensive Test Environment for verification, validation, debugging and test.
AMBA Assertion Based VIP (ABVIP) with Compliance Solution
AMBA Universal Verification Component (UVC) with Compliance Management System (CMS)
CAN Universal Verification Component (UVC) with Compliance Management System (CMS)
SpeedBridge for AGP
SpeedBridge for Ethernet
SpeedBridge for PCI-Express
SpeedBridge for PCI/PCI-X
SpeedBridge for RGB
SpeedBridge
LIN Universal Verification Component (UVC) with Compliance Management System (CMS)
MIPI CSI Universal Verification Component (UVC) with Compliance vPlan, OVM Compliant
MIPI DigRF v4 Universal Verification Component (UVC)
MIPI DSI Universal Verification Component (UVC), OVM Compliant
MIPI PHY Universal Verification Component (UVC), OVM Compliant
MIPI SLIMbus Universal Verification Component (UVC)
MIPI UniPro Universal Verification Component (UVC)
MIPI Universal Verification Component (UVC) with Compliance Management System (CMS)
OCP Assertion Based VIP (ABVIP) with Compliance Solution
OCP Universal Verification Component (UVC) with Compliance Management System (CMS)
PCI Express Universal Verification Component (UVC) with Compliance Management System (CMS)
PCI Universal Verification Component (UVC) with Compliance Management System (CMS)
SAS Universal Verification Component (UVC) with Compliance Management System (CMS)
SATA Universal Verification Component (UVC) with Compliance Management System (CMS)
Cadence Integration-Optimized USB3.0 Device Controller
SuperSpeed USB (3.0) VIP with Compliance Management System (CMS)
USB 2.0 VIP with Compliance Management System (CMS)
Verification IP for AMBA AXI
Verification IP for CE-ATA
High-Quality Verification IP for Ethernet 1/10/40/100Gb specification
Comprehensive memory & bus protocol verification IP - Vendor-certified, high-quality models including adv. verification features
Verification IP for PCI Express 3/2/1.1 + IOV based on the PCI Express specifications from the PCI-SIG organization
Verification IP for Serial ATA II
Verification IP for SuperSpeed USB 3.0 specification from the USB 3.0 Promoter Group
USB OTG Verification IP
USB2.0 Verification IP
AMBA AHB Verification Component is based on reusable methodology that allows coverage driven verification
AMBA AHB OVM Class based Verification Component allows coverage driven verification suitable for Master, Slave and AHB bus
DDR2 SDRAM VIP can be used to verify JEDEC Standard (JESD79-2D) based DDR2 SDRAM Memory Model(s)
HDMI OVM Module based UVC is a is suitable for verification of HDMI source (transmitter) and/or HDMI sink (receiver)
HDMI VMM-based VIP conforms to HDMI1.3a specifications and is suitable for HDMI Source(transmitter)/ HDMI Sink(receiver)
I2C SystemVerilog VC is fully configurable and easy to use for both module and system-level verification
I2C VMM based VIP is highly configurable & scalable and is suitable for verification of I2C Master/ Slave.
VMM & OVM 2.0 Class based MIPI CSI-2 SystemVerilog VIP is compliant to the CSI-2 MIPI Specification
AMBA AXI Verification component allows coverage driven verification suitable for AXI Master, AXI Slave and the AXI bus
OVM Class based SDIO HOST Verification IP (VIP) is designed to verify SDIO card, SD memory card, SD Combo card & Multimedia Card
The Gigabit Ethernet OVM Module based VC can be used to verify any IEEE802.3:2000 and IEEE Draft P802.3ae/D4.0 compliant device
A DUT with an I2C interface can be verified with a single I2C OVM Module based VC, configured appropriately
PCI-X OVM Module based VC can be used for verification of any Peripheral Component Interconnect (PCI) agent
SPI OVM Compliant VC can be used to verify Master or Slave devices following the SPI basic protocol
The SPI 4 interface is used for packet / cell transfer between physical layer and link layer devices
PCI-X eVC can be used for verification of any Peripheral Component Interconnect (PCI) agent across all levels of abstraction
PS2 eVC consists of Host and PS2 device agent, that generate traffic, and passive controller agent, that monitors transaction
The SAS verification component (VC) is a ready-made, configurable SystemC VC suitable to verify Serial Attached SCSI designs
eInfochips' Serial ATA SystemC Verification Component is used for designs with Serial ATA interface
The SONET eVC can be used for verification of any Synchronous Optical Network components
SPI eVC can be used to verify Master or Slave devices following the SPI basic protocol
SPI VMM based VIP is highly configurable & scalable and is suitable for verification of SPI Master/ Slave
SPI4.2 Verification IP can be used to verify physical layer and data link layer devices that follow the SPI 4 P2 protocol
USB 2.0 SVC provides protocol checking, transaction level monitoring and coverage
UWB SystemC Verification Component performs module level verification and can be scaled to verify the UWB design in a system
The XAUI eVC can be used to verify any IEEE P802.3ae/D4.0 compliant MAC or PHY device
Ethernet Verification IP. Universally compatable with all languages including Vera, Specman, C/C++ and SystemVerilog.
Fibre Channel (FC) Verification IP. Universally compatable with all languages including Vera, Specman, C/C++ and SystemVerilog.
PCI Express Gen 1-3 Verification IP. Universally compatable with all languages including SystemVerilog,Vera, Specman, and C/C++.
Serial SCSI (SAS) Verification IP. Universally compatable with all languages including Vera, Specman, C/C++ and SystemVerilog.
Serial ATA (SATA) Verification IP. Universally compatible with all languages including Vera, Specman, C/C++ and SystemVerilog
10 Gigabit Ethernet Monitor for simulation and formal verification
Accelerated Graphics Port (AGP) Monitor for simulation and formal verification
AMBA 3 APB Monitor for simulation and formal verification
AMBA AXI Monitor for simulation and formal verification
CSIX Level 1 Monitor for simulation and formal verification
DDR SDRAM Monitor for simulation and formal verification
DDR2 SDRAM Monitor for simulation and formal verification
I2C Monitor for simulation and formal verification
Low Pin Count (LPC) Monitor for simulation and formal verification
OCP2.0 Monitor for simulation and formal verification
PCI Express monitor for simulation and formal verification
PCI/PCI-X Monitor for simulation and formal verification
POS-PHY Monitor for simulation and formal verification
QDR SRAM Monitor for simulation and formal verification
Serial Attached SCSI (SAS) Monitor for simulation and formal verification
Serial ATA (SATA) Monitor for simulation and formal verification
SigmaRAM SRAM Monitor for simulation and formal verification
SPI4.2 Monitor for simulation and formal verification
USB 1.1 Monitor for simulation and formal verification
USB 2.0 Monitor for simulation and formal verification
UTOPIA Monitor for simulation and formal verification
AMBA AHB Verification IP in SystemVerilog(OVM/VMM) and Verilog
AMBA APB Verification IP in SystemVerilog(OVM/VMM) and Verilog
AMBA AXI Verification IP in SystemVerilog(OVM/VMM) and Verilog
ATAPI Verification IP
DDR2 Verification IP in SystemVerilog(OVM/VMM) and Verilog
DDR3 Verification IP in SystemVerilog(OVM/VMM) and Verilog
Ethernet (100/40/10/1G) Verification IP in SystemVerilog (OVM/VMM) & Verilog
I2C Verification IP in SystemVerilog(OVM/VMM) and Verilog
IEEE 1284 Verification IP
PCI-X 2.0 Verification IP in SystemVerilog(OVM/VMM) and Verilog
PCI EXPRESS 3.0 Verification IP in native Verilog & SystemVerilog (OVM/VMM)
PCI Verification IP in System Verilog (OVM/VMM) & Verilog
PCMCIA Verification
SAS Verification IP in SystemVerilog(OVM/VMM) and Verilog
SATA nVS in SystemVerilog(OVM/VMM) and Verilog
SDIO Verification IP in SystemVerilog(OVM/VMM) and Verilog
SMBus Verification IP in SystemVerilog(OVM/VMM) and Verilog
SPI 4.2 Verification IP in SystemVerilog (OVM/VMM) and Verilog
SR-IOV Verification IP in System Verilog (OVM/VMM) & Verilog
UART Verification IP in SystemVerilog(OVM/VMM) and Verilog
USB 2.0 Verification IP in SystemVerilog(OVM/VMM) and Verilog
USB 3.0 nVS in SystemVerilog(OVM/VMM) and Verilog
PDKChek Independent Die-Level Monitor
USB2.0 Function Controller OVA Checker AIP
Bluetooth Baseband Controller OVA Checker AIP
USB 2.0 Vera RVM VIP
USB 2.0 Open Vera Verification IP
Ethernet 10/100/1G/10G Monitor Verification IP
Ethernet 10/100/1G/10G Transceiver Verification IP
AMBA 2.0 AHB Bus (arbiter, decoder, muxes) Verification IP
AMBA 2.0 AHB Master Verification IP
AMBA 2.0 AHB Monitor Verification IP
AMBA 2.0 AHB Slave Verification IP
AMBA 2.0 APB Master Verification IP
AMBA 2.0 APB Monitor Verification IP
AMBA 2.0 APB Slave Verification IP
AMBA 3 AXI Interconnect Verification IP
Master for AMBA 3 AXI Verification IP
AMBA 3 AXI Monitor Verification IP
AMBA 3 AXI Slave Verification IP
I2C Verification IP
OCP Master Verification IP
OCP Monitor Verification IP
OCP Slave Verification IP
PCI Express Monitor Verification IP
PCI Express TxRx Verification IP
SATA 1.5, 3.0 and 6 Gbps Verification IP
SATA 1.5, 3.0 and 6 Gbps Monitor Verification IP
Serial I/O Monitor Verification IP
Serial I/O TxRx Verification IP
USB 1.1, 2.0 and On-the-Go Device Verification IP
USB 1.1, 2.0 and On-the-Go Host Verification IP
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