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Analyzing Die Size, Power and Cost Tradeoffs Between Different Cell Libraries for Mobile Applications

Wolfgang Helfricht
Product Manager for Standard Cells
ARM

Jeff Ng
Director of Engineering
Chip Estimate Corporation

Automated chip estimation gives early insight into advantages of different IP libraries. ARM and Chip Estimate teamed up to show how designers of complex SoCs for wireless applications can quickly assess different standard cell libraries. Specifically, how different libraries will impact a final chip implementation with respect to die size, power, yield and packaged chip cost.

This presentation was first presented at DesignCon 2007. It discusses how automated chip estimation software is used to explore various ARM physical IP Advantage, Advantage HS, and Metro libraries and to facilitate architectural what-if analysis. Different IP combinations in a chip context are analyzed and tradeoffs are considered with the goal of developing the best chip specification to meet stringent performance, power and cost requirements. In the case of mobile applications, these tradeoffs focus on achieving a plan that combines longer battery life and solid performance with the lowest cost.

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