Arteris is backed by an international set of venture capitalists and its management team brings experience from the communications, semiconductor, EDA, and IP industries.
The following key networking concepts are part of Arteris answer to the needs of SoC designers:
Separation of the communication protocol and its hardware implementation into well-defined layers, to facilitate independent optimization of each layer.
Packetization of transactions entering the NoC.
Use of standardized packets for all information flows (data, control).
Switch and link-style fabric(s) with QOS-aware packet routing.
Flexible NoC topologies to match total system performance needs
To this end, Arteris technology has been developed to provide the best possible wire efficiency, along with the warranty that the interconnect will not bottleneck the final SoC.
Arteris completes its offer with a powerful set of EDA tools to analyze and implement the best NoC solution for today's multimedia, telecommunication infrastructure and application processor chips.